Intel 200 MHz FV8050366200 User Manual

Product codes
FV8050366200
Page of 51
E
PENTIUM® PROCESSOR WITH MMX™ TECHNOLOGY
35
5/23/97 10:47 AM    24318502.DOC
INTEL CONFIDENTIAL
(until publication date)
Table 15.  Pentium
®
 Processor with MMX™ Technology AC Specifications for
66-MHz Bus Operation (Cont’d)
(See Table 10 for V
CC
 and T
CASE
 specifications, C
L
 = 0 pF.)
Symbol
Parameter
Min
Max
Unit
Figure
Notes
t
7
ADS#, ADSC#, AP, A3-A31,
PWT, PCD, BE0-7#, M/IO#,
D/C#, W/R#, CACHE#, SCYC,
LOCK# Float Delay
10.0
ns
6
(1)
t
8a
APCHK#, IERR#, FERR# Valid
Delay
1.0
8.3
ns
5
(4)
t
8b
PCHK# Valid Delay
1.0
7.0
ns
5
(4)
t
9a
BREQ Valid Delay
1.0
8.0
ns
5
(4)
t
9b
SMIACT# Valid Delay
1.0
7.3
ns
5
(4)
t
9c
HLDA Valid Delay
1.0
6.8
ns
5
t
10a
HIT# Valid Delay
1.0
6.8
ns
5
t
10b
HITM# Valid Delay
0.7
6.0
ns
5
t
11a
PM0-1, BP0-3 Valid Delay
1.0
10.0
ns
5
t
11b
PRDY Valid Delay
1.0
8.0
ns
5
t
12
D0-D63, DP0-7 Write Data Valid
Delay
1.3
7.5
ns
5
t
13
D0-D63, DP0-3 Write Data Float
Delay
10.0
ns
6
(1)
t
14
A5-A31 Setup Time
6.0
ns
7
(26)
t
15
A5-A31 Hold Time
1.0
ns
7
t
16a
INV, AP Setup Time
5.0
ns
7
t
16b
EADS# Setup Time
5.0
ns
7
t
17
EADS#, INV, AP Hold Time
1.0
ns
7
t
18a
KEN# Setup Time
5.0
ns
7
t
18b
NA#, WB/WT# Setup Time
4.5
ns
7
t
19
KEN#, WB/WT#, NA# Hold Time
1.0
ns
7
t
20
BRDY#, BRDYC# Setup Time
5.0
ns
7
t
21
BRDY#, BRDYC# Hold Time
1.0
ns
7
t
22
AHOLD, BOFF# Setup Time
5.5
ns
7
t
23
AHOLD, BOFF# Hold Time
1.0
ns
7
t
24a
BUSCHK#, EWBE#, HOLD
Setup Time
5.0
ns
7