Intel III 450 MHz 80525PY450512 Data Sheet

9

The Intel

®

 Pentium

®

III processor is the next member of the P6 family, in the Intel

®

 IA-32 

processor line. Like the Intel

®

 Pentium

®

II processor, the Pentium III processor implements the 

Dynamic Execution microarchitecture - a unique combination of multiple branch prediction, data 
flow analysis, and speculative execution. This enables these processors to deliver higher 
performance than the Pentium processor, while maintaining binary compatibility with all previous 
Intel Architecture processors. The Pentium III processor also executes Intel

®

 MMX™ technology 

instructions for enhanced media and communication performance just as it’s predecessor, the 
Pentium II processor. The Pentium III processor executes Internet Streaming SIMD Extensions for 
enhanced floating point and 3-D application performance. In addition, the Pentium III processor 
extends the concept of processor identification with the addition of a processor serial number. 
Refer to the Intel

 Processor Serial Number application note (Document Number 

245125

) for 

more detailed information. The Pentium III processor utilizes multiple low-power states such as 
AutoHALT, Stop-Grant, Sleep, and Deep Sleep to conserve power during idle times.

The Pentium III processor utilizes the same multiprocessing system bus technology as the 
Pentium II processor. This allows for a higher level of performance for both uni-processor and two-
way multiprocessor (2-way MP) systems. See the Intel

 Pentium

Update (Document Number 244453) for guidelines on which processors can be mixed in an MP 
system. Memory is cacheable for 4 GB of addressable memory space, allowing significant 
headroom for desktop systems.

The Pentium III processor is available with two different second level (L2) cache implementations. 
The “Discrete” cache version (CPUID=067xh) uses commercially available parts for the L2 cache. 
The L2 cache is composed of an external (to processor silicon) TagRAM and burst pipelined 
synchronous static RAM (BSRAM), as seen in 

. The “Advanced Transfer Cache” 

(CPUID=068xh) does not use commercially available L2 cache parts. Its L2 cache resides entirely 
within the processor silicon, as seen in 

. Refer to 

 to determine the L2 cache 

implementation for each Pentium III processor.

Pentium III processors are offered in either Single Edge Contact Cartridge (S.E.C.C.) or Single 
Edge Contact Cartridge 2 (S.E.C.C.2) package technologies. The S.E.C.C. package has the 
following features: an extended thermal plate, a cover, and a substrate with an edge finger 
connection. The extended thermal plate allows heatsink attachment or customized thermal 
solutions. The S.E.C.C.2 package has a cover and a substrate with an edge finger connection. This 
allows the thermal solutions to be placed directly onto the processor core package. The edge finger 
connection maintains socketability for system configuration. The edge finger connector is called 
the ‘SC242 connector’ in this and other documentation.

Processor

Core

Tag

L2

Processor

Core

L2

Discrete Cache

Advanced Transfer Cache