Intel S2600JFQ BBS2600JFQ User Manual
Product codes
BBS2600JFQ
Product Architecture Overview
Intel®
Server Board S2600JF TPS
Revision 1.3
Intel order number G31608-004
18
The following are generic DIMM population requirements that generally apply to the Intel
®
Server Board S2600JF.
All DIMMs must be DDR3 DIMMs.
Unbuffered DIMMs can be ECC only.
Mixing of Registered and Unbuffered DIMMs is not allowed per platform.
Mixing of LRDIMM with any other DIMM type is not allowed per platform.
Mixing of DDR3 voltages is not validated within a socket or across sockets by Intel
®
. If
1.35V (DDR3L) and 1.50V (DDR3) DIMMs are mixed, the DIMMs will run at 1.50V.
Mixing of DDR3 operating frequencies is not validated within a socket or across sockets
by Intel
by Intel
®
. If DIMMs with different frequencies are mixed, all DIMMs will run at the
common lowest frequency.
Quad rank RDIMMs are supported but not validated by Intel
®
.
A maximum of eight logical ranks (ranks seen by the host) per channel is allowed.
3.3.2.3
Publishing System Memory
The BIOS displays the “Total Memory” of the system during POST if Display Logo is
disabled in the BIOS setup. This is the total size of memory discovered by the BIOS
during POST, and is the sum of the individual sizes of installed DDR3 DIMMs
in the system.
disabled in the BIOS setup. This is the total size of memory discovered by the BIOS
during POST, and is the sum of the individual sizes of installed DDR3 DIMMs
in the system.
The BIOS displays the “Effective Memory” of the system in the BIOS setup. The term
Effective Memory refers to the total size of all DDR3 DIMMs that are active (not
disabled) and not used as redundant units.
Effective Memory refers to the total size of all DDR3 DIMMs that are active (not
disabled) and not used as redundant units.
The BIOS provides the total memory of the system in the main page of the BIOS setup.
This total is the same as the amount described by the first bullet above.
This total is the same as the amount described by the first bullet above.
If Display Logo is disabled, the BIOS displays the total system memory on the diagnostic
screen at the end of POST. This total is the same as the amount described by the first
bullet above.
screen at the end of POST. This total is the same as the amount described by the first
bullet above.
3.3.2.4
RAS Features
The server board supports the following memory RAS modes:
Independent Channel Mode
Rank Sparing Mode
Mirrored Channel Mode
Lockstep Channel Mode
Rank Sparing Mode
Mirrored Channel Mode
Lockstep Channel Mode
Regardless of RAS mode, the requirements for populating within a channel given in the section
3.3.2.2 must be met at all times. Note that support of RAS modes that require matching DIMM
population between channels (Mirrored and Lockstep) require that ECC DIMMs be populated.
3.3.2.2 must be met at all times. Note that support of RAS modes that require matching DIMM
population between channels (Mirrored and Lockstep) require that ECC DIMMs be populated.
For RAS modes that require matching populations, the same slot positions across channels
must hold the same DIMM type with regards to size and organization. DIMM timings do not
have to match but timings will be set to support all DIMMs populated (that is, DIMMs with slower
timings will force faster DIMMs to the slower common timing modes).
must hold the same DIMM type with regards to size and organization. DIMM timings do not
have to match but timings will be set to support all DIMMs populated (that is, DIMMs with slower
timings will force faster DIMMs to the slower common timing modes).