Intel S2600JFQ BBS2600JFQ User Manual
Product codes
BBS2600JFQ
Product Architecture Overview
Intel®
Server Board S2600JF TPS
Revision 1.3
Intel order number G31608-004
16
Table 4. UDIMM Support Guidelines
Ranks Per DIMM and
Data Width
Memory Capacity Per
DIMM1
Speed (MT/s) and Voltage Validated by
Slot per Channel (SPC) and DIMM Per
Channel (DPC)
2,3
1 Slot per Channel
1DPC
1.35V
1.5V
SRx8 ECC
1GB
2GB
4GB
1066, 1333
1066, 1333, 1600
DRx8 ECC
2GB
4GB
8GB
1066, 1333
1066, 1333, 1600
Notes:
1. Supported DRAM Densities are 1Gb, 2Gb, and 4Gb. Only 2Gb and 4Gb are validated by Intel
®
2. Command Address Timing is 1N for 1DPC and 2N for 2DPC
3. No Support for 3DPC when using UDIMMs
3. No Support for 3DPC when using UDIMMs
Table 5. RDIMM Support Guidelines
Ranks Per DIMM
and Data Width
Memory Capacity Per DIMM1
Speed (MT/s) and Voltage Validated
by
Slot per Channel (SPC) and DIMM
Per Channel (DPC)
2
1 Slot per Channel
1DPC
1.35V
1.5V
SRx8
1GB
2GB
4GB
1066, 1333
1066, 1333, 1600
DRx8
2GB
4GB
8GB
1066, 1333
1066, 1333, 1600
SRx4
2GB
4GB
8GB
1066, 1333
1066, 1333, 1600
DRx4
4GB
8GB
16GB
1066, 1333
QRx4
8GB
16GB
32GB
800
1066
QRx8
4GB
8GB
16GB
800
1066
Notes:
1. Supported DRAM Densities are 1Gb, 2Gb, and 4Gb. Only 2Gb and 4Gb are validated by Intel
®
2. Command Address Timing is 1N
Table 6. LRDIMM Support Guidelines
Ranks Per DIMM and
Data Width1
Memory Capacity Per
DIMM2
Speed (MT/s) and Voltage Validated
by
Slot per Channel (SPC) and DIMM
Per Channel (DPC)
3,4,5
1 Slot per Channel
1DPC
1.35V
1.5V
QRx4 (DDP)
6
8GB
32GB
1066, 1333
1066, 1333
QRx8 (DPP)
6
4GB
16GB
1066, 1333
1066, 1333
Notes:
1. Physical Rank is used to calculate DIMM Capacity
2. Supported and validated DRAM Densities are 2Gb and 4Gb
3. Command address timing is 1N
4. The speeds are estimated targets and will be verified through simulation
5. For 3SPC/3DPC
2. Supported and validated DRAM Densities are 2Gb and 4Gb
3. Command address timing is 1N
4. The speeds are estimated targets and will be verified through simulation
5. For 3SPC/3DPC
– Rank Multiplication (RM) >=2
6. DDP
– Dual Die Package DRAM stacking. P – Planar monolithic DRAM Dies.
3.3.2.2
Memory population rules