Intel III Xeon 733 MHz 80526KZ733256 User Manual
Product codes
80526KZ733256
SIGNAL QUALITY
40
4.3.4 2.5V TOLERANT BUFFER RINGBACK SPECIFICATION
The ringback specification is the voltage at a receiving pin that a signal rings back to after achieving its maximum absolute
value. (See Figure 14 for an for an illustration of ringback.) Excessive ringback can cause false signal detection or extend
the propagation delay. Violations of the signal ringback specification are not allowed for 2.5V tolerant signals.
Table 30 shows signal ringback specifications for the 2.5V tolerant signals to be used for simulations at the processor
core.
value. (See Figure 14 for an for an illustration of ringback.) Excessive ringback can cause false signal detection or extend
the propagation delay. Violations of the signal ringback specification are not allowed for 2.5V tolerant signals.
Table 30 shows signal ringback specifications for the 2.5V tolerant signals to be used for simulations at the processor
core.
Table 30. Signal Ringback Specifications for 2.5V Tolerant Signal Simulation at the processor Core
Input Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Non-AGTL+ Signals
0
→ 1
1.7
V 14
Non-AGTL+ Signals
1
→ 0
0.7
V 14
4.3.5 2.5V TOLERANT BUFFER SETTLING LIMIT GUIDELINE
Settling limit defines the maximum amount of ringing at the receiving pin that a signal must reach before its next transition.
The amount allowed is 10% of the total signal swing (VHI – VLO) above and below its final value. A signal should be
within the settling limits of its final value, when either in its high state or low state, before it transitions again. Violation of
the settling limit guideline is acceptable if simulations of 5 to 10 successive transitions do not show the amplitude of the
ringing increasing in the subsequent transitions.
The amount allowed is 10% of the total signal swing (VHI – VLO) above and below its final value. A signal should be
within the settling limits of its final value, when either in its high state or low state, before it transitions again. Violation of
the settling limit guideline is acceptable if simulations of 5 to 10 successive transitions do not show the amplitude of the
ringing increasing in the subsequent transitions.