Intel i5-3210M AW8063801032301 User Manual
Product codes
AW8063801032301
Electrical Specifications
104
Datasheet, Volume 1
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
value.
3.
V
IH
is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4.
V
IH
and V
OH
may experience excursions above V
DDQ
. However, input signal drivers must comply with the
signal quality specifications.
5.
This is the pull-up/pull-down driver resistance.
6.
R
TERM
is the termination on the DIMM and in not controlled by the processor.
7.
The minimum and maximum values for these signals are programmable by BIOS to one of the two sets.
8.
SM_RCOMPx resistance must be provided on the system board with 1% resistors. SM_RCOMPx resistors
are to V
SS
.
9.
SM_DRAMPWROK must have a maximum of 15 ns rise or fall time over V
DDQ
* 0.55
±
200 mV and the
edge must be monotonic.
10. SM_VREF is defined as V
DDQ
/2.
11. R
on
tolerance is preliminary and might be subject to change.
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
CCIO
referred to in these specifications refers to instantaneous V
CCIO
.
3.
For V
IN
between “0” V and V
CCIO
. Measured when the driver is tristated.
4.
V
IH
and V
OH
may experience excursions above
V
CCIO. However, input signal drivers must comply with the
signal quality specifications.
I
LI
Input Leakage
Current (DQ, CK)
0V
0.2*V
0V
0.2*V
DDQ
0.8*V
DDQ
V
DDQ
—
—
± 0.75
± 0.55
± 0.55
± 0.9
± 1.4
± 1.4
mA
I
LI
Input Leakage
Current (CMD, CTL)
0V
0.2*V
0V
0.2*V
DDQ
0.8*V
DDQ
V
DDQ
—
—
± 0.85
± 0.65
± 1.10
± 1.65
± 0.65
± 1.10
± 1.65
mA
SM_RCOMP0
Command COMP
Resistance
138.6
140
141.4
Ω
8
SM_RCOMP1
Data COMP
Resistance
25.245
25.5
25.755
Ω
8
SM_RCOMP2
ODT COMP
Resistance
198
200
202
Ω
8
Table 7-11. DDR3/DDR3L/DDR3L-RS Signal Group DC Specifications (Sheet 2 of 2)
Symbol
Parameter
Min
Typ
Max
Units
Notes
1
Table 7-12. Control Sideband and TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Units
Notes
1
V
IL
Input Low Voltage
—
V
CCIO
* 0.3
V
2
V
IH
Input High Voltage
V
CCIO
* 0.7
—
V
2, 4
V
OL
Output Low Voltage
—
V
CCIO
* 0.1
V
2
V
OH
Output High Voltage
V
CCIO
* 0.9
—
V
2, 4
R
ON
Buffer on Resistance
23
73
Ω
I
LI
Input Leakage Current
—
±200
μA
3