Intel G640T CM8062301002204 User Manual

Product codes
CM8062301002204
Page of 296
Datasheet, Volume 2
107
Processor Configuration Registers
2.6.28
SS—Subsystem ID and Subsystem Vendor ID Register
System BIOS can be used as the mechanism for loading the SSID/SVID values. These 
values must be preserved through power management transitions and a hardware 
reset.
2.6.29
MSI_CAPID—Message Signaled Interrupts Capability ID 
Register
When a device supports MSI, it can generate an interrupt request to the processor by 
writing a predefined data item (a message) to a predefined memory address.
The reporting of the existence of this capability can be disabled by setting MSICH 
(CAPL[0] @ 7Fh). In that case walking this linked list will skip this capability and 
instead go directly from the PCI PM capability to the PCI Express capability.
B/D/F/Type:
0/1/0–2/PCI
Address Offset:
8C–8Fh
Reset Value:
0000_8086h
Access:
RW-O
Size:
32 bits
Bit
Attr
Reset 
Value
RST/
PWR
Description
31:16
RW-O
0000h
Uncore
Subsystem ID (SSID)
Identifies the particular subsystem and is assigned by the vendor. 
15:0
RW-O
8086h
Uncore
Subsystem Vendor ID (SSVID)
Identifies the manufacturer of the subsystem and is the same as 
the vendor ID which is assigned by the PCI Special Interest Group. 
B/D/F/Type:
0/1/0–2/PCI
Address Offset:
90–91h
Reset Value:
A005h
Access:
RO
Size:
16 bits
Bit
Attr
Reset 
Value
RST/
PWR
Description
15:8
RO
A0h
Uncore
Pointer to Next Capability (PNC)
This contains a pointer to the next item in the capabilities list which 
is the PCI Express capability.
7:0
RO
05h
Uncore
Capability ID (CID)
Value of 05h identifies this linked list item (capability structure) as 
being for MSI registers.