Intel G640T CM8062301002204 User Manual
Product codes
CM8062301002204
Processor Configuration Registers
182
Datasheet, Volume 2
2.11.2
PVCCAP2—Port VC Capability Register 2
This register describes the configuration of PCI Express Virtual Channels associated
with this port.
with this port.
2.11.3
PVCCTL—Port VC Control Register
B/D/F/Type:
0/6/0/MMR
Address Offset:
108–10Bh
Reset Value:
0000_0000h
Access:
RO
Size:
32 bits
BIOS Optimal Default
0000h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:24
RO
00h
Uncore
VC Arbitration Table Offset (VCATO)
This field indicates the location of the VC Arbitration Table. This
This field indicates the location of the VC Arbitration Table. This
field contains the zero-based offset of the table in DQWORDS (16
bytes) from the base address of the Virtual Channel Capability
Structure. A value of 0 indicates that the table is not present (due
to fixed VC priority).
23:8
RO
0h
Reserved
7:0
RO
00h
Uncore
Reserved for VC Arbitration Capability (VCAC)
B/D/F/Type:
0/6/0/MMR
Address Offset:
10C–10Dh
Reset Value:
0000h
Access:
RW, RO
Size:
16 bits
BIOS Optimal Default
000h
Bit
Attr
Reset
Value
RST/
PWR
Description
15:4
RO
0h
Reserved
3:1
RW
000b
Uncore
VC Arbitration Select (VCAS)
This field will be programmed by software to the only possible
This field will be programmed by software to the only possible
value as indicated in the VC Arbitration Capability field. Since there
is no other VC supported than the default, this field is reserved.
0
RO
0b
Uncore
Reserved for Load VC Arbitration Table (VCARB)
Used for software to update the VC Arbitration Table when VC
Used for software to update the VC Arbitration Table when VC
arbitration uses the VC Arbitration Table. As a VC Arbitration Table
is never used by this component this field will never be used.