Intel G640T CM8062301002204 User Manual
Product codes
CM8062301002204
Datasheet, Volume 2
77
Processor Configuration Registers
2.5.28
BDSM—Base Data of Stolen Memory Register
This register contains the base address of graphics data stolen DRAM memory. BIOS
determines the base of graphics data stolen memory by subtracting the graphics data
stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0, offset
BCh, bits 31:20).
determines the base of graphics data stolen memory by subtracting the graphics data
stolen memory size (PCI Device 0 offset 52 bits 7:4) from TOLUD (PCI Device 0, offset
BCh, bits 31:20).
2.5.29
BGSM—Base of GTT stolen Memory Register
This register contains the base address of stolen DRAM memory for the GTT. BIOS
determines the base of GTT stolen memory by subtracting the GTT graphics stolen
memory size (PCI Device 0, offset 52h, bits 9:8) from the Graphics Base of Data Stolen
Memory (PCI Device 0, offset B0h, bits 31:20).
determines the base of GTT stolen memory by subtracting the GTT graphics stolen
memory size (PCI Device 0, offset 52h, bits 9:8) from the Graphics Base of Data Stolen
Memory (PCI Device 0, offset B0h, bits 31:20).
B/D/F/Type:
0/0/0/PCI
Address Offset:
B0–B3h
Reset Value:
0000_0000h
Access:
RW-KL, RW-L
Size:
32 bits
BIOS Optimal Default
00000h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:20
RW-L
000h
Uncore
Graphics Base of Stolen Memory (BDSM)
This register contains bits 31:20 of the base address of stolen
This register contains bits 31:20 of the base address of stolen
DRAM memory. BIOS determines the base of graphics stolen
memory by subtracting the graphics stolen memory size (PCI
Device 0, offset 52h, bits 6:4) from TOLUD (PCI Device 0, offset
BCh, bits 31:20).
19:1
RO
0h
Reserved
0
RW-KL
0b
Uncore
Lock (LOCK)
This bit will lock all writeable settings in this register, including
This bit will lock all writeable settings in this register, including
itself.
B/D/F/Type:
0/0/0/PCI
Address Offset:
B4–B7h
Reset Value:
0010_0000h
Access:
RW-KL, RW-L
Size:
32 bits
BIOS Optimal Default
00000h
Bit
Attr
Reset
Value
RST/
PWR
Description
31:20
RW-L
001h
Uncore
Graphics Base of GTT Stolen Memory (BGSM)
This register contains the base address of stolen DRAM memory for
This register contains the base address of stolen DRAM memory for
the GTT. BIOS determines the base of GTT stolen memory by
subtracting the GTT graphics stolen memory size (PCI Device 0,
offset 52h, bits 11:8) from the Graphics Base of Data Stolen
Memory (PCI Device 0, offset B0h, bits 31:20).
19:1
RO
0h
Reserved
0
RW-KL
0b
Uncore
Lock (LOCK)
This bit will lock all writeable settings in this register, including
This bit will lock all writeable settings in this register, including
itself.