Intel i5-2540M FF8062700839209 User Manual

Datasheet

19

Refer to the following documents for additional information. 

§

Storage Conditions

A non-operational state. The processor may be installed in a platform, 
in a tray, or loose. Processors may be sealed in packaging or exposed 
to free air. Under these conditions, processor landings should not be 
connected to any supply voltages, have any I/Os biased or receive any 
clocks. Upon exposure to “free air” (i.e., unsealed packaging or a 
device removed from packaging material) the processor must be 
handled in accordance with moisture sensitivity labeling (MSL) as 
indicated on the packaging material.

TAC

Thermal Averaging Constant.

TDP

Thermal Design Power.

V

CC

Processor core power supply.

V

SS

Processor ground.

V

AXG

Graphics core power supply.

V

TT

L3 shared cache, memory controller, and processor I/O power rail.

V

DDQ

DDR3 power rail.

VLD

Variable Length Decoding.

x1

Refers to a Link or Port with one Physical Lane.

x4

Refers to a Link or Port with four Physical Lanes.

x8

Refers to a Link or Port with eight Physical Lanes.

x16

Refers to a Link or Port with sixteen Physical Lanes.

http://www.acpi.info/

http://www.pcisig.com/
specifications

http://www.pcisig.com

http://www.jedec.org

http://www.vesa.org

http://www.intel.com/products/
processor/manuals/index.htm

253665 

253666

253667

253668

253669