Intel i5-2540M FF8062700839209 User Manual
Product codes
FF8062700839209
Datasheet
79
Signal Description
6.12
Processor Power Signals
Table 37.
Processor Power Signals (Sheet 1 of 3)
Signal Name
Description
Direction/Buffer
Type
VCC
Processor core power rail.
Ref
VTT
(VTT0 and VTT1)
Processor I/O power rail (1.05 V). VTT0
and VTT1 should share the same VR
and VTT1 should share the same VR
Ref
VDDQ
DDR3 power rail (1.5 V)
Ref
VCCPLL
Power rail for filters and PLLs (1.8 V)
Ref
ISENSE
Current Sense from a VR-compliant regulator
to the processor core.
to the processor core.
I
A
PROC_DPRSLPVR
Processor output signal to VR controller to
indicate that the processor is in the package
C6 state.
indicate that the processor is in the package
C6 state.
O
CMOS
PSI#
Processor Power Status Indicator: This
signal is asserted when the processor core
current consumption is less than 15 A.
Assertion of this signal is an indication that
the VR controller does not currently need to
provide ICC above 15 A. The VR controller
can use this information to move to a more
efficient operating point. This signal will de-
assert at least 3.3 µs before the current
consumption will exceed 15 A. The minimum
PSI# assertion and de-assertion time is 1
BCLK.
signal is asserted when the processor core
current consumption is less than 15 A.
Assertion of this signal is an indication that
the VR controller does not currently need to
provide ICC above 15 A. The VR controller
can use this information to move to a more
efficient operating point. This signal will de-
assert at least 3.3 µs before the current
consumption will exceed 15 A. The minimum
PSI# assertion and de-assertion time is 1
BCLK.
O
Asynchronous CMOS