AMD Opteron 1216 2.4GHz OSA1216CSBOX Product Datasheet

23932 Rev. 3.19 September 2006

Electrical Interfaces
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HyperTransport™ technology: LVDS-Like 
differential, unidirectional

–

DDR SDRAM: SSTL_2 per JEDEC specification

–

Clock, reset, and test signals also use DDR 
SDRAM-like electrical specifications

Packaging
–

Lidded Lan Grid Array package

–

35 x 35 grid array

–

Compliant with RoHS (EU Directive 2002/95/EC) 
with lead used only in small amounts in 
specifically exempted applications

Integrated Memory Controller
–

Low-latency, high-bandwidth

–

144-bit DDR SDRAM at up to 333 MHz 

–

Supports up to eight registered DIMMs

–

ECC checking with double-bit detect and single-
bit correct

–

On-line spare feature provides single-rank DRAM 
redundancy

HyperTransport™ Technology to I/O Devices
–

Three links, 16-bits in each direction, each 
supports up to 2000 MT/s or 4.0 GB/s in each 
direction (2000MT/s supported by Rev E and later)

–

Each link on uniprocessor (UP) models supports 
connections to I/O devices.

–

Each link on dual-processor (DP) models supports 
connections to I/O devices, and any one of the three 
available links may connect to another DP or MP 
processor.

–

Each link on multiprocessor (MP) models supports 
connections to I/O devices or other DP or MP 
processors.