NEC Intel Xeon E5-2420 N8101-571F User Manual

Product codes
N8101-571F
Page of 258
Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families
97
Datasheet Volume One
Power Management
• Additional power savings actions, as allowed by the exit latency requirements, 
include putting Intel QPI and PCIe* links in L1, the uncore is not available, further 
voltage reduction can be taken.
In package C6 state, all cores have saved their architectural state and have had their 
core voltages reduced to zero volts. The LLC retains context, but no accesses can be 
made to the LLC in this state, the cores must break out to the internal state package C2 
for snoops to occur.
4.2.6
Package C-State Power Specifications
The table below lists the processor package C-state power specifications for various 
processor SKUs.
Notes:
1.
Package C1E power specified at Tcase = 60°C.
2.
Package C3/C6 power specified at Tcase = 50°C.
4.3
System Memory Power Management
The DDR3 power states can be summarized as the following:
• Normal operation (highest power consumption).
Table 4-10. Package C-State Power Specifications
TDP SKUs
C1E (W)
C3 (W)
C6 (W)
8-Core / 6-Core 
150W (8-core)
58
27
15
135W (8-core)
47
22
15
130W (8-core)
47
22
15
130W (6-core)
53
35
21
130W (6-core 1S WS)
53
35
21
115W (8-core)
47
22
15
95W (8-core)
47
22
35 (E5-2660)
15
95W (6-core)
48
22
35 (E5-2620)
15
21 (E5-2620)
70W (8-core)
39
20
14
60W (6-core)
38
20
14
LV95W-8C (8-core)
47
22
15
LV70W-8C (8-core)
39
20
14
4-Core / 2-Core
130W (4-core)
53
28
16
130W (4-Core 1S WS)
53
28
16
95W (4-core)
47
22
15
80W (4-core)
42
21
30 (E5-2603)
16
80W (2-core)
42
30
21