Intel i7-3540M AW8063801108900 User Manual

88

Datasheet, Volume 1

SM_DRAMPWROK

SM_DRAMPWROK Processor Input: Connects to PCH 

DRAMPWROK. 

I

Asynchronous

CMOS

UNCOREPWRGOOD

The processor requires this input signal to be a clean indication 

that the V

CCSA

, V

CCIO

, V

AXG

, and V

DDQ

, power supplies are 

stable and within specifications. This requirement applies 

regardless of the S-state of the processor. 'Clean' implies that 

the signal will remain low (capable of sinking leakage current), 

without glitches, from the time that the power supplies are 

turned on until they come within specification. The signal must 

then transition monotonically to a high state. This is connected 

to the PCH PROCPWRGD signal.

I

Asynchronous 

CMOS

SKTOCC# (rPGA only)

PROC_DETECT# (BGA)

Detect): This signal is pulled down directly (0 Ohms) on the 

processor package to the ground. There is no connection to the 

processor silicon for this signal. System board designers may 

use this signal to determine if the processor is present.

PROC_SELECT#

Processor Select: This signal is an output that indicates if the 

processor used is 2nd Generation Intel

®

 Core™ processor family 

mobile or Mobile 3rd Generation Intel

®

 Core™ processor family.

For 2nd Generation Intel

®

 Core™ processor family mobile, the 

output will be high. 
For Mobile 3rd Generation Intel

®

 Core™ processor family, the 

output will be low.

O

VCCIO_SEL

Voltage selection for VCCIO: This output signal was initially 

intended to select the I/O voltage depending on the processor 

being used. 
Since the V

CCIO

 voltage is the same for 2nd Generation Intel

®

 

Core™ processor family mobile and Mobile 3rd Generation 

Intel

®

 Core™ processor family, the usage of this signal was 

changed as follows: This signal should not be used.

O