Intel i3-3130M AW8063801111500 User Manual

Product codes
AW8063801111500
Page of 112
Power Management 
60
Datasheet, Volume 1
4.4
PCI Express* Power Management
• Active power management support using L0s and L1 states.
• All inputs and outputs disabled in L2/L3 Ready state.
Note:
PCIe* interface does not support Hot-Plug.
Note:
An increase in power consumption may be observed when PCIe Active State Power 
Management (ASPM) capabilities are disabled.
4.5
DMI Power Management
• Active power management support using L0s/L1 state.
4.6
Graphics Power Management
4.6.1
Intel
®
 Rapid Memory Power Management (Intel
®
 RMPM)  
(also known as CxSR)
The Intel Rapid Memory Power Management (Intel RMPM) puts rows of memory into 
self-refresh mode during C3/C6 to allow the system to remain in the lower power states 
longer. Processors routinely save power during runtime conditions by entering the C3, 
C6 state. Intel RMPM is an indirect method of power saving that can have a significant 
effect on the system as a whole.
4.6.2
Intel
®
 Graphics Performance Modulation Technology 
(Intel
®
 GPMT)
Intel Graphics Power Modulation Technology (Intel
®
 GPMT) is a method for saving 
power in the graphics adapter while continuing to display and process data in the 
adapter. This method will switch the render frequency and/or render voltage 
dynamically between higher and lower power states supported on the platform based 
on render engine workload.
In products where Intel
®
 Graphics Dynamic Frequency (also known as Turbo Boost 
Technology) is supported and enabled, the functionality of Intel GPMT will be 
maintained by Intel Graphics Dynamic Frequency (also known as Turbo Boost 
Technology).
4.6.3
Graphics Render C-State
Render C-State (RC6) is a technique designed to optimize the average power to the 
graphics render engine during times of idleness of the render engine. Render C-state is 
entered when the graphics render engine, blitter engine and the video engine have no 
workload being currently worked on and no outstanding graphics memory transactions. 
When the idleness condition is met then the Processor Graphics will program the VR 
into a low voltage state (~0
 
V) through the SVID bus.
Caution:
Long term reliability cannot be assured unless all the Low Power Idle States are 
enabled.