Intel 1005M AW8063801121200 User Manual

Datasheet, Volume 1

83

Regardless of enabling the automatic or on-demand modes, in the event of a 
catastrophic cooling failure, the package will automatically shut down when the silicon 
has reached an elevated temperature that risks physical damage to the product. At this 
point the THERMTRIP# signal will go active.

Critical Temperature detection is performed by monitoring the package temperature. 
This feature is intended for graceful shutdown before the THERMTRIP# is activated. 
However, the processor execution is not ensured between critical temperature and 
THERMTRIP#. If the Adaptive Thermal Monitor is triggered and the temperature 
remains high, a critical temperature status and sticky bit are latched in the 
PACKAGE_THERM_STATUS MSR 1B1h and also generates a thermal interrupt if 
enabled. For more details on the interrupt mechanism, refer to the Intel

The processor provides an auxiliary mechanism that allows system software to force 
the processor to reduce its power consumption using clock modulation. This 
mechanism is referred to as “On-Demand” mode and is distinct from Adaptive Thermal 
Monitor and bi-directional PROCHOT#. The processor platforms must not rely on 
software usage of this mechanism to limit the processor temperature. On-Demand 
Mode can be done using processor MSR or chipset I/O emulation.

On-Demand Mode may be used in conjunction with the Adaptive Thermal Monitor. 
However, if the system software tries to enable On-Demand mode at the same time the 
TCC is engaged, the factory configured duty cycle of the TCC will override the duty 
cycle selected by the On-Demand mode. If the I/O based and MSR-based On-Demand 
modes are in conflict, the duty cycle selected by the I/O emulation-based On-Demand 
mode will take precedence over the MSR-based On-Demand Mode. 

If Bit 4 of the IA32_CLOCK_MODULATION MSR is set to a 1, the processor will 
immediately reduce its power consumption using modulation of the internal core clock, 
independent of the processor temperature. The duty cycle of the clock modulation is 
programmable using Bits 3:1 of the same IA32_CLOCK_MODULATION MSR. In this 
mode, the duty cycle can be programmed in either 12.5% or 6.25% increments 
(discoverable using CPUID). Thermal throttling using this method will modulate each 
processor core’s clock independently. 

I/O emulation-based clock modulation provides legacy support for operating system 
software that initiates clock modulation through I/O writes to ACPI defined processor 
clock control registers on the chipset (PROC_CNT). Thermal throttling using this 
method will modulate all processor cores simultaneously.