Intel G1620T CM8063701448300 User Manual
Product codes
CM8063701448300
PCU – Power Management Controller (PMC)
960
Datasheet
19.2.2
Event Input Signals and Their Usage
The processor has various input signals that trigger specific events. This section
describes those signals and how they should be used.
describes those signals and how they should be used.
19.2.3
PCI Express* WAKE# Signal and PME Event Message
PCI Express ports can wake the platform from any sleep state (S3, S4, or S5) using the
PMC_WAKE_PCIE[3:0]# pins. PMC_WAKE_PCIE[3:0]# is treated as a wake event, but
does not cause any bits to go active in the GPE0a_STS register.
PMC_WAKE_PCIE[3:0]# pins. PMC_WAKE_PCIE[3:0]# is treated as a wake event, but
does not cause any bits to go active in the GPE0a_STS register.
Note:
PMC_WAKE_PCIE[3:0]# functionality is disabled by setting
PM1_STS_EN.PCIEXP_WAKE_DIS[3:0] respectively to 1b.
PM1_STS_EN.PCIEXP_WAKE_DIS[3:0] respectively to 1b.
PCI Express ports have the ability to cause PME using messages. When a PME message
is received, the processor will set the GPE0a_STS.PCI_EXP_STS bit.
is received, the processor will set the GPE0a_STS.PCI_EXP_STS bit.
19.2.3.1
PMC_PWRBTN# (Power Button)
The PMC_PWRBTN# signal operates as a “Fixed Power Button” as described in the
Advanced Configuration and Power Interface specification. The signal has a 16 ms
debounce on the input. The state transition descriptions are included in
Advanced Configuration and Power Interface specification. The signal has a 16 ms
debounce on the input. The state transition descriptions are included in
. Note
that the transitions start as soon as the PMC_PWRBTN# is pressed (but after the
debounce logic), and does not depend on when the power button is released.
debounce logic), and does not depend on when the power button is released.
Note:
During the time that the PMC_SLP_S4# signal is stretched for the minimum assertion
width (if enabled), the power button is not a wake event. Refer to note below for more
details.
width (if enabled), the power button is not a wake event. Refer to note below for more
details.
Power Button Override Function
Table 140. Transitions Due to Power Button
Present
State
Event
Transition/Action
Comment
S0/Cx
PMC_PWRBTN# goes
low
SMI# or SCI generated (depending
on PM1_CNT.SCI_EN,
PM1_STS_EN.PWRBTN_EN and
SMI_EN.GBL_SMI_EN)
Software typically initiates a
Sleep state
S3–S5
PMC_PWRBTN# goes
low
Wake Event. Transitions to S0
state
Standard wakeup
G3
PMC_PWRBTN#
pressed
None
No effect since no power
Not latched nor detected
Not latched nor detected
S0,
S3–S4
PMC_PWRBTN# held
low for at least 4
consecutive seconds
Unconditional transition to S5 state No dependence on processor or
any other subsystem