Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
470
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.8.55 IIONFERRHD_[0:3]
IIO Core Non-Fatal FERR Header.
Header log stores the IIO data path header information of the associated IIO core error. 
The header indicates where the error is originating from and the address of the cycle.
The IIO Core Non-Fatal FERR Header totally has 128 bits. Refer to the below table for 
the mapping between Header and IIONFERRHD_[0:3] registers. 
14.8.56 IIOERRCNTSEL
IIO Core Error Counter Selection.
Bit
Register
Offset
127:96
IIONFERRHD_3
0x330
95:64
IIONFERRHD_2
0x32c
63:32
IIONFERRHD_1
0x328
31:0
IIONFERRHD_0
0x324
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x324
Size: 128 bits
Bit
Attr
Default
Description
127:90
RV
-
Reserved.
89:89
ROS_V
0x0
Error Type:
0: MA
1: CA
88:81
ROS_V
0x0
Message Code.
80:65
ROS_V
0x0
MSI Data. 
64:58
ROS_V
0x0
Internal Routing ID. 
57:56
ROS_V
0x0
Fmt.
55:51
ROS_V
0x0
Type. 
50:0
ROS_V
0x0
Address.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x33c
Bit
Attr
Default
Description
31:7
RV
-
Reserved.
6:6
RW_L
0x0
c6:
C6 Error Count Select.
5:5
RV
-
Reserved2:
Reserved.
4:4
RW_L
0x0
c4:
C4 Error Count Select.
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