Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
PCU - Power Management Controller (PMC)
1002
Datasheet
19.6
PCU PMC IO Registers
19.6.1
PORT92: Init Register (PORT92)—Offset 92h
Access Method
Default: 00h
Table 145.
Summary of PCI iLB PMC I/O Registers
Offset
Size
Register ID—Description
Default
Value
92h
1
00h
B2h
1
00h
B3h
1
00h
CF9h
1
00h
Type: I/O Register
(Size: 8 bits)
PORT92: 92h
7
4
0
0
0
0
0
0
0
0
0
re
se
rv
ed
alt
_
a20_gate
init_now
Bit
Range
Default &
Access
Description
7:2
0b
RO
reserved: Reserved.
1
0b
RW
ALT_A20_GATE - Alternate A20 Gate (alt_a20_gate): Legacy bit - kept just in case
DOS expects it to be read/write
0
0b
RW
INIT_NOW (init_now): When this bit transitions from a 0 to a 1, PMC will sent an
INIT# VLW to T-Unit