Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
PCU – System Management Bus (SMBus)
1096
Datasheet
22.2.7
SMBus Slave Interface
The processor does not implement a complete SMBus slave interface. Only the Host
Notify Command is implemented to maintain specification compatibility.
Notify Command is implemented to maintain specification compatibility.
22.2.7.1
Format of Host Notify Command
The processor tracks and responds to the standard Host Notify command as specified in
the System Management Bus (SMBus) Specification, Version 2.0. The host address for
this command is fixed to 0001000b. If the processor already has data for a previously-
received host notify command which has not been serviced yet by the host software (as
indicated by the SMB_Mem_SSTS.HNST bit), then it will NACK following the host
address byte of the protocol. This allows the host to communicate non-acceptance to
the master and retain the host notify address and data values for the previous cycle
until host software completely services the interrupt.
the System Management Bus (SMBus) Specification, Version 2.0. The host address for
this command is fixed to 0001000b. If the processor already has data for a previously-
received host notify command which has not been serviced yet by the host software (as
indicated by the SMB_Mem_SSTS.HNST bit), then it will NACK following the host
address byte of the protocol. This allows the host to communicate non-acceptance to
the master and retain the host notify address and data values for the previous cycle
until host software completely services the interrupt.
Note:
Host software must always clear the SMB_Mem_SSTS.HNST bit after completing any
necessary reads of the address and data registers.
necessary reads of the address and data registers.
The following table shows the Host Notify format.
22.3
Use
22.3.1
Function Disable
The SMBus interface may be disable by setting FUNC_DIS_2.SMB_DIS to 1b.
Table 163. Host Notify Format
Bit
Description
Driven By
Comment
1
Start
External Master
8:2
SMB Host Address – 7 bits
External Master
Always 0001_000
9
Write
External Master
Always 0
10
ACK (or NACK)
Processor
Processor NACKs if SMB_Mem_SSTS.HNST is
1
17:11
Device Address – 7 bits
External Master
Indicates the address of the master; loaded
into the Notify Device Address Register
(SMB_Mem_NDA)
18
Unused – Always 0
External Master
7-bit-only address; this bit is inserted to
complete the byte
19
ACK
Processor
27:20
Data Byte Low – 8 bits
External Master
Loaded into the Notify Data Low Byte Register
(SMB_Mem_NDLB)
28
ACK
Processor
36:29
Data Byte High – 8 bits
External Master
Loaded into the Notify Data High Byte Register
(SMB_Mem_NDHB)
37
ACK
Processor
38
Stop
External Master