Intel J1850 FH8065301455200 User Manual

Datasheet

13

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001

• Initial release

October 2013

002

• Minor edits throughout for clarity
• Added Intel Pentium processor N3530 and N2930 
• Added Intel Celeron processor N3830 and N2807
• Added Intel Pentium processor J2900
• Added Intel Celeron processor J1900

Chapter 1

• Updated the table details of the to include new SKUs
• Updated feature overview for interfaces that are supported for 

Windows 8.1 Non Connected Standby

Chapter 2

• Updated the table details of the GPIO Signals for GPIO_S0_SC[046], 

GPIO_S0_SC[047], GPIO_S0_SC[048], GPIO_S5[15], GPIO_S5[16], 

GPIO_S5[17]

Chapter 5

• Added table note (Processor Clock Outputs) that Intel recommends 

25 MHz. 19.2 MHz is not validated

Chapter 6

• De-featured C6IS for all SKUs
• Removed  C1E  power  state

- Updated Section 6.3.4, Processor Core C-States Description

- Updated 6.3.5, Package C-States

• Remove Table’s note that S0ix is supported only on the Premium SKU.
• Table 40, Processor Sx-States to SLP_S*#. Updated the table details 

of the SoC Sx-States to SLPT_S*# for PMC_PLTRST# from 0 or 1 to 

High or Low to match platform understanding.

Chapter 7

• Updated the figure and notes of the S0 to S3 to S4/S5 (Power Down) 

Sequence without S0ix

Chapter 8

• Table 51, Processor Thermal Specifications. Updated the table details 

of the Thermal Specification to include new SKUs. Added the table 

note to clarify the definition for (Tj) at TDP and (Tj,max).

• Section 8.3, Voltage and Current Specifications. Remove VCC and 

VNN from Processor Power Rail DC Specifications and Max Current 

table.

• Updated Table 53, Processor VCC and VNN Currents

Chapter 10

• Updated Section 10.1 note on Thermal management support
• Updated Table 91, Supported DDR3L SO-DIMM Size

Chapter 13

• Updated sub-chapter VED (Video Encode/Decode) that Video encode 

is NOT supported on all SKUs

Chapter 14

• Figure 18, xHCI and EHCI Port Mapping. Added figure note.
• Section 14.6.45, USB2 Port Disable Override (USB2PDO)—Offset E4h. 

Updated to correctly reflect the power well.

• Added Section 14.7, USB xHCI Memory Mapped I/O Registers

Chapter 15

• Updated register content

Chapter 25

• Updated register content

March 2014