Intel J1850 FH8065301455200 User Manual
Product codes
FH8065301455200
Datasheet
57
Integrated Clock
5
Integrated Clock
Clocks are integrated, consisting of multiple variable frequency clock domains, across
different voltage domains. This architecture achieves a low power clocking solution that
supports the various clocking requirements of the processor’s many interfaces.
different voltage domains. This architecture achieves a low power clocking solution that
supports the various clocking requirements of the processor’s many interfaces.
Figure 7.
Clocking Example
Integrated Clock
O
Clock Inputs
And Outputs
SDIO
SD CARD
MEMORY CHANNEL 1
MEMORY CHANNEL 0
eMMC
Power
Management/Seq.
HDMI/eDP/DP
Misc
25MHz
32kHz
Primary Reference
Primary Reference
DDI[1:0]_TXP/N[3]
DDI[1:0]_DDCCLK
DDI[1:0]_DDCCLK
PMC_PLT_CLK[5:0]
DRAM0_CLKP/N[2,0]
DRAM1_CLKP/N[2,0]
SDMMC1_CLK
SDMMC3_CLK
SDMMC2_CLK
PMC_SUSCLK[3:0]
SIO_I2C5_CLK
SVID_CLK
PCIE_CLKP/N[3:0]
PCIe