Intel J1850 FH8065301455200 User Manual

Product codes
FH8065301455200
Page of 1272
PCI Express* 2.0
704
Datasheet
17.5
PCI Configuration Registers
Registers listed are for function 0 (root port 1). All other root ports contain the same 
registers. Differences for other root ports (functions 1-32) will be noted in individual 
registers.
Figure 23.
PCI Express Register Map
Bus 0
CPU
Core
Graphics
D:2,F:0
PCI
ECAM
(Mem)
PCI
CAM
(I/O)
SoC Transaction 
Router
D:0,F:0
DMA F:0
PWM1 F:1
HSUART2 F:4
SIO D:30
LPC (iLB) F:0
SMB F:3
PCU
D:3
1
PC
Ie
 D
:2
8
SATA
D:19,F:0
PCI Space
PWM2 F:2
HSUART1 F:3
SPI F:5
RP1 F:0
RP2 F:1
RP3 F:2
RP4 F:3
#2 D:17,F:0
SD
/
MMC
#3 D:18,F:0
#1 D:16,F:0
DMA F:0
I2C0 F:1
I2C3 F:4
SI
O D
:2
4
I2C1 F:2
I2C2 F:3
I2C4 F:5
I2C5 F:6
I2C6 F:7
HDA
D:27,F:0
xHCI USB
D:20,F:0
EHCI USB
D:29,F:0
Trusted Execution 
Engine (TXE)
D:26,F:0
LPE Audio (I2S)
D:21,F:0
PCI Express 
PCI Headers
D:28,F:0-3