Intel Phi 7120A SC7120A Data Sheet

Product codes

SC7120A

Intel

Xeon Phi™ Coprocessor Datasheet

Document ID Number: 328209 003EN

which will cause the frequency to drop to the minimum possible value (refer to

Section 3.2.1

). The level and duration of the power surge are programmable by the end

user (refer chapter on manageability for more details).

Additionally, there may be applications that draw up to 245W. This should be taken into
account when choosing one of the three modes of operation as listed below:

— Users can install both the 2x4 and 2x3 power connectors for total available

power of 300W. In this case, the card may draw up to 245W of power

depending on the application. This mode ensures sufficient power is available

and reduces the risk of throttling. Users may see power dissipation approach

245W, as applications become more highly tuned to take advantage of the

Intel® Xeon Phi™ coprocessor architecture.

— Users can install either the 2x4 connector only or two 2x3 connectors for total

available power of 225W. The card is designed to support power surges of up to

236W. If the power surge goes above 236W for more than 300ms, then the

SMC on the card will instruct the Intel® Xeon Phi™ coprocessor to drop its

operating frequency by approximately 100MHz, thus reducing power

dissipation by approximately 10W.

— If a greater card power limitation is desired, users can configure the SMC to

further limit the power draw of the 5110P SKU, ensuring compatibility with less

capable power delivery systems (refer to

Section 6.5

5.2

Intel

Xeon Phi™ Coprocessor Power States

Figure 5-1

Figure 5-8

are a schematic representation of the inter-relationship

between the different coprocessor and memory power states on the Intel

Xeon Phi™

coprocessor.

These schematic representations are only for illustrative purposes and do not represent
all possible low power states. Cx and Mx refer to coprocessor and memory power
states.

In this power state, the card is expected to operate at its maximum TDP rating.

Note:

No application is expected to dissipate maximum power from cores and memory

simultaneously.

Figure 5-1. Coprocessor in C0-state and Memory in M0-state

(Full on)

Full bandwidth enabled

Fan

~100%