Intel Phi 7120A SC7120A Data Sheet

Product codes
SC7120A
Page of 78
Document ID Number: 328209 003EN
Intel
®
 Xeon Phi™ Coprocessor Datasheet
55
Coprocessor C1 state gates clocks on a core-by-core basis, reducing core power. On the 
active SKU, the fan slows to an appropriate speed, reducing fan power. If all cores enter 
C1, the coprocessor automatically enters Auto-pC3 state.
If clock-enable input to memory is pulled high, then memory enters M1 state which 
reduces memory power.
Figure 5-2. Some cores are in C0-state and other cores in C1-state; Memory in M0-state
C1 - Halt
(clocks
gated)
C0
(Full on)
Full bandwidth enabled
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
M0
VR
VR
Fan
<100%
Figure 5-3. All Cores In C1 state; Memory In M1 state
Full bandwidth enabled
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
M1
C1 - Halt
(clocks
gated)
Fan
<100%
VR
VR