Intel Phi 7120A SC7120A Data Sheet
Product codes
SC7120A
Intel
®
Xeon Phi™ Coprocessor Datasheet
Document ID Number: 328209 003EN
62
The manageability architecture also provides support for the Intel
®
Xeon Phi™
coprocessor in Node Manager mode, which adds functionality such as setting power
throttle threshold values and time windows.
throttle threshold values and time windows.
In operational mode, the SMC monitors power and temperatures within the Intel
®
Xeon
Phi™ coprocessor and through sensors located on the PCI Express* card. This
information is then used to control the power consumed by the PCI Express* card and
the rotating speed of the fan(s) within the PCI Express* card cooling system. The SMC
provides status information (temperature, fan speed, and voltage levels) to the Intel
information is then used to control the power consumed by the PCI Express* card and
the rotating speed of the fan(s) within the PCI Express* card cooling system. The SMC
provides status information (temperature, fan speed, and voltage levels) to the Intel
®
Xeon Phi™ coprocessor drivers, which then can be provided to the end user via a GUI.
The SMC provides a master/slave SMBus (using the IPMI IPMB protocol) so that a
platform BMC or ME can control the SMC.
The SMC provides a master/slave SMBus (using the IPMI IPMB protocol) so that a
platform BMC or ME can control the SMC.
The SMC on the Intel
®
Xeon Phi™ coprocessor has the following capabilities:
• General manageability features
• Board ID and SKU definition
• Unique identifying number
• Fan Control
• Board ID and SKU definition
• Unique identifying number
• Fan Control
— Read fan RPM
• Thermal throttling and throttle monitoring
— Force throttling of the coprocessor
— Monitor time in throttled state
— Separated status if power throttle threshold throttling vs. over-temperature
— Monitor time in throttled state
— Separated status if power throttle threshold throttling vs. over-temperature
throttling
• Card-level power throttle threshold/capping
— Power Throttle Threshold Values 0 and 1, tracked over separate time windows
Figure 6-1
Intel
®
Xeon Phi™ Coprocessor System Manageability Architecture
Customer Management Software
Out‐of‐ Band
In‐ Band
Custom
Firmware
Node
Manager
BMC
ME
Intel Chipset
Host Drivers
Ganglia
SMC
Update
Control
Panel
Intel® Xeon Phi™ Coprocessor SMC
PCIe Endpoint
Metrics, Drivers, Error Handler
Coprocessor
OS