Intel i3-4360T CM8064601481958 User Manual

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The semantics for accessing APIC registers have been revised to simplify the

programming of frequently-used APIC registers by system software. Specifically,

the software semantics for using the Interrupt Command Register (ICR) and End

Of Interrupt (EOI) registers have been modified to allow for more efficient delivery

and dispatching of interrupts.

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The x2APIC extensions are made available to system software by enabling the

local x2APIC unit in the “x2APIC” mode. To benefit from x2APIC capabilities, a

new operating system and a new BIOS are both needed, with special support for

x2APIC mode.

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The x2APIC architecture provides backward compatibility to the xAPIC architecture

and forward extendible for future Intel platform innovations.

Intel x2APIC Technology may not be available on all SKUs.

For more information, see the Intel

 64 Architecture x2APIC Specification at 

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The processor includes enhanced power-performance technology that routes

interrupts to threads or cores based on their sleep states. As an example, for energy

savings, it routes the interrupt to the active cores without waking the deep idle cores.

For performance, it routes the interrupt to the idle (C1) cores without interrupting the

already heavily loaded cores. This enhancement is mostly beneficial for high-interrupt

scenarios like Gigabit LAN, WLAN peripherals, and so on.

The Execute Disable Bit allows memory to be marked as executable when combined

with a supporting operating system. If code attempts to run in non-executable

memory, the processor raises an error to the operating system. This feature can

prevent some classes of viruses or worms that exploit buffer overrun vulnerabilities

and can thus help improve the overall security of the system. See the Intel

IA-32 Architectures Software Developer's Manuals for more detailed information.

Supervisor Mode Execution Protection provides the next level of system protection by

blocking malicious software attacks from user mode code when the system is running

in the highest privilege level. This technology helps to protect from virus attacks and

unwanted code from harming the system. For more information, refer to Intel

and IA-32 Architectures Software Developer's Manual, Volume 3A at: 

Desktop 4th Generation Intel

®

 Core

™

 Processor Family, Desktop Intel

®

 Pentium

®

 Processor Family, and Desktop Intel

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 Celeron

®

Processor Family

Datasheet – Volume 1 of 2

July 2014

48

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