Intel i3-4360T CM8064601481958 User Manual

Product codes
CM8064601481958
Page of 125
Error and Thermal Protection Signals
Table 40.
Error and Thermal Protection Signals
Signal Name
Description
Direction / Buffer
Type
CATERR#
Catastrophic Error: This signal indicates that the system has
experienced a catastrophic error and cannot continue to
operate. The processor will set this for non-recoverable
machine check errors or other unrecoverable internal errors.
CATERR# is used for signaling the following types of errors:
Legacy MCERRs, CATERR# is asserted for 16 BCLKs. Legacy
IERRs, CATERR# remains asserted until warm or cold reset.
O
GTL
PECI
Platform Environment Control Interface: A serial
sideband interface to the processor, it is used primarily for
thermal, power, and error management.
I/O
Asynchronous
PROCHOT#
Processor Hot: PROCHOT# goes active when the processor
temperature monitoring sensor(s) detects that the processor
has reached its maximum safe operating temperature. This
indicates that the processor Thermal Control Circuit (TCC) has
been activated, if enabled. This signal can also be driven to
the processor to activate the TCC.
GTL Input
Open-Drain Output
THERMTRIP#
Thermal Trip: The processor protects itself from catastrophic
overheating by use of an internal thermal sensor. This sensor
is set well above the normal operating temperature to ensure
that there are no false trips. The processor will stop all
execution when the junction temperature exceeds
approximately 130 °C. This is signaled to the system by the
THERMTRIP# pin.
O
Asynchronous OD
Asynchronous CMOS
Power Sequencing Signals
Table 41.
Power Sequencing Signals
Signal Name
Description
Direction / Buffer
Type
SM_DRAMPWROK
SM_DRAMPWROK Processor Input: This signal
connects to the PCH DRAMPWROK.
I
Asynchronous CMOS
PWRGOOD
The processor requires this input signal to be a clean
indication that the V
CC
 and V
DDQ
 power supplies are
stable and within specifications. This requirement
applies regardless of the S-state of the processor.
'Clean' implies that the signal will remain low (capable
of sinking leakage current), without glitches, from the
time that the power supplies are turned on until the
supplies come within specification. The signal must
then transition monotonically to a high state.
I
Asynchronous CMOS
SKTOCC#
SKTOCC# (Socket Occupied)/PROC_DETECT#:
(Processor Detect): This signal is pulled down
directly (0 Ohms) on the processor package to ground.
There is no connection to the processor silicon for this
signal. System board designers may use this signal to
determine if the processor is present.
6.9  
6.10  
Processor—Signal Description
Desktop 4th Generation Intel
®
 Core
 Processor Family, Desktop Intel
®
 Pentium
®
 Processor Family, and Desktop Intel
®
 Celeron
®
Processor Family
Datasheet – Volume 1 of 2
July 2014
92
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