DELL 2 x Intel Xeon E7-4860 338-BFMX User Manual

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Datasheet Volume 2 of 2 

All thermal sensors, including the uncore thermal sensor, have a catastrophic trip 
output which is asserted when sensor temperature exceeds its thermtrip threshold 
temperature. These signals are all asynchronously or'd together onto the THERMTRIP# 
pin. Assertion of any of the catastrophic trip signals causes disabling of all the PLLs 
through internal powergood de-assertion for quick response. On recognition of 
THERMTRIP#, system takes additional actions to prevent physical damage to various 
components on the system including removing power support to the socket. Intel Xeon 
Processor E7-8800/4800/2800 Product Families implementation is similar as in Intel 
Xeon processor 7500 series.

PROCHOT# is asserted on the package when any core thermal sensor's digital value 
matches the fused Thermal Monitor trip temperature, it also initiate TM2 transition 
internally. Intel Xeon Processor E7-8800/4800/2800 Product Families implementation is 
similar as in Intel Xeon processor 7500 series.

FORCEPR# is asserted by chipset in response to system hot condition detected in one 
of the system component (VR and so forth), processor response to FORCEPR by doing 
core V/F transition to lowest support ratio and initiating core clock modulation. Intel 
Xeon Processor E7-8800/4800/2800 Product Families implementation is similar as in 
Intel Xeon processor 7500 series.

Intel Xeon Processor E7-8800/4800/2800 Product Families support PECI interface for 
platform environment control. PECI implementation is very similar as in Intel Xeon 
Processor 7500 Series (with necessary 10 core extension) with support of one 
additional feature (Side band P-state control) of limiting P-state through PECI mailbox 
command. 

The power consumption of the processor is an important consideration in the design of 
any modern platform. In addition to the power consumed when the processor is active, 
there are constraints involving the power consumption when the processor is idle. 

In order to minimize the idle power consumption of the processor, multiple low power 
idle states are typically implemented. There tends to be an inverse relationship 
between the time it takes to enter and exit one of these low power states and the 
power consumption while in that state. Idle states with very low power consumption 
tend to have longer entry and exit latencies than states with higher power 
consumption. The specific low power state to be used is chosen dynamically by the 
operating system, based on the usage characteristics of the processor over recent 
history.

The interface describing the low power states provided on the processor and how they 
are used by the operating system is described via the ACPI (Advanced Configuration 
and Power Interface) specification. In ACPI terminology, processor execution states are