Microchip Technology IC MCU OTP 4K PIC16C74B-20/L PLCC-44 MCP PIC16C74B-20/L Data Sheet
Product codes
PIC16C74B-20/L
1998-2013 Microchip Technology Inc.
DS30605D-page 29
PIC16C63A/65B/73B/74B
5.0
I/O PORTS
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
5.1
PORTA and TRISA Registers
PORTA is a 6-bit latch.
The RA4/T0CKI pin is a Schmitt Trigger input and an
open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All pins have
data direction bits (TRIS registers), which can config-
ure these pins as output or input.
open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All pins have
data direction bits (TRIS registers), which can config-
ure these pins as output or input.
Setting a TRISA register bit puts the corresponding out-
put driver in a hi-impedance mode. Clearing a bit in the
TRISA register puts the contents of the output latch on
the selected pin(s).
put driver in a hi-impedance mode. Clearing a bit in the
TRISA register puts the contents of the output latch on
the selected pin(s).
Reading the PORTA register reads the status of the
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, the value is modified and then written to the port
data latch.
pins, whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, the value is modified and then written to the port
data latch.
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin.
input to become the RA4/T0CKI pin.
On the PIC16C73B/74B, PORTA pins are multiplexed
with analog inputs and analog V
with analog inputs and analog V
REF
input. The opera-
tion of each pin is selected by clearing/setting the con-
trol bits in the ADCON1 register (A/D Control
Register1).
trol bits in the ADCON1 register (A/D Control
Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 5-1:
INITIALIZING PORTA
(PIC16C73B/74B)
(PIC16C73B/74B)
BCF
STATUS, RP0
;
CLRF
PORTA
; Initialize PORTA by
; clearing output
; data latches
BSF
STATUS, RP0
; Select Bank 1
MOVLW
0x06
; Configure all pins
MOVWF
ADCON1
; as digital inputs
MOVLW
0xCF
; Value used to
; initialize data
; direction
MOVWF
TRISA
; Set RA<3:0> as inputs
; RA<5:4> as outputs
; TRISA<7:6> are always
; read as '0'.
FIGURE 5-1:
BLOCK DIAGRAM OF
RA3:RA0 AND RA5 PINS
RA3:RA0 AND RA5 PINS
FIGURE 5-2:
BLOCK DIAGRAM OF
RA4/T0CKI PIN
RA4/T0CKI PIN
Note:
On all RESETS, pins with analog functions
are configured as analog and digital inputs.
are configured as analog and digital inputs.
Data
Bus
Bus
Q
D
Q
CK
Q
D
Q
CK
Q
D
EN
P
N
WR
Port
Port
WR
TRIS
TRIS
Data Latch
TRIS Latch
RD TRIS
RD Port
V
SS
V
DD
I/O pin
(1)
Note
1: I/O pins have protection diodes to V
DD
and V
SS
.
Analog
Input
mode
Input
mode
TTL
Input
Buffer
Input
Buffer
To A/D Converter
Data
Bus
Bus
WR
Port
Port
WR
TRIS
TRIS
RD Port
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Input
Buffer
Trigger
Input
Buffer
N
V
SS
I/O pin
TMR0 Clock Input
Q
D
Q
CK
Q
D
Q
CK
EN
Q
D
EN
(1)
Note
1: I/O pins have protection diodes to V
DD
and V
SS
.