Microchip Technology IC PIC MCU PIC16F1937-I/PT TQFP-44 MCP PIC16F1937-I/PT Data Sheet
Product codes
PIC16F1937-I/PT
PIC16(L)F1934/6/7
DS41364E-page 96
2008-2011 Microchip Technology Inc.
FIGURE 7-3:
INT PIN INTERRUPT TIMING
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
Q2
Q1
Q3 Q4
OSC1
CLKOUT
INT pin
INTF
GIE
INSTRUCTION FLOW
PC
Instruction
Fetched
Instruction
Executed
Interrupt Latency
PC
PC + 1
PC + 1
0004h
0005h
Inst (0004h)
Inst (0005h)
Dummy Cycle
Inst (PC)
Inst (PC + 1)
Inst (PC – 1)
Inst (0004h)
Dummy Cycle
Inst (PC)
—
Note 1:
INTF flag is sampled here (every Q1).
2:
Asynchronous interrupt latency = 3-5 T
CY
. Synchronous latency = 3-4 T
CY
, where T
CY
= instruction cycle time.
Latency is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
3:
CLKOUT not available in all Oscillator modes.
4:
For minimum width of INT pulse, refer to AC specifications in the applicable Electrical Specifications Chapter.
5:
INTF is enabled to be set any time during the Q4-Q1 cycles.
(1)
(2)
(3)
(4)
(5)
(1)