Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT Data Sheet

Product codes
PIC18F65K22-I/PT
Page of 550
 2009-2011 Microchip Technology Inc.
DS39960D-page 207
PIC18F87K22 FAMILY
FIGURE 14-7:
TIMER1 GATE SINGLE PULSE AND TOGGLE COMBINED MODE
TABLE 14-5:
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER 
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH
PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
PIR1
PSPIF
ADIF
RC1IF
TX1IF
SSP1IF
TMR1GIF
TMR2IF
TMR1IF
PIE1
PSPIE
ADIE
RC1IE
TX1IE
SSP1IE
TMR1GIE
TMR2IE
TMR1IE
IPR1
PSPIP
ADIP
RC1IP
TX1IP
SSP1IP
TMR1GIP
TMR2IP
TMR1IP
TMR1L
Timer1 Register Low Byte
TMR1H
Timer1 Register High Byte
T1CON
TMR1CS1 TMR1CS0 T1CKPS1
T1CKPS0
SOSCEN
T1SYNC
RD16
TMR1ON
T1GCON
TMR1GE
T1GPOL
T1GTM
T1GSPM
T1GGO/
T1DONE
T1GVAL
T1GSS1
T1GSS0
OSCCON2
SOSCRUN
SOSCGO
MFIOFS
MFIOSEL
PMD1
PSPMD
CTMUMD
RTCCMD
TMR4MD
TMR3MD
TMR2MD
TMR1MD
EMBDM
Legend:
Shaded cells are not used by the Timer1 module.
Note 1:
Unimplemented on 32-Kbyte devices (PIC18FX5K22).
TMR1GE
T1GPOL
T1G_IN
T1CKI
T1GVAL
Timer1
N
N + 1
N + 2
T1GSPM
T1GGO/
T1DONE
Set by Software
Cleared by Hardware on
Falling Edge of T1GVAL
Set by Hardware on
Falling Edge of T1GVAL
Cleared by Software
Cleared by
Software
RTCCIF
T1GTM
Counting Enabled on
Rising Edge of T1G
N + 4
N + 3