Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
PIC18F87K22 FAMILY
DS39960D-page 160
2009-2011 Microchip Technology Inc.
REGISTER 11-20: IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
R/W-1
TMR7GIP
(
)
TMR12IP
(
)
TMR10IP
TMR8IP
TMR7IP
(
)
TMR6IP
TMR5IP
TMR4IP
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR7GIP:
TMR7 Gate Interrupt Priority bit
1
= High priority
0
= Low priority
bit 6
TMR12IP:
TMR12 to PR12 Match Interrupt Priority bit
1
= High priority
0
= Low priority
bit 5
TMR10IP:
TMR10 to PR10 Match Interrupt Priority bit
1
= High priority
0
= Low priority
bit 4
TMR8IP:
TMR8 to PR8 Match Interrupt Priority bit
1
= High priority
0
= Low priority
bit 3
TMR7IP:
TMR7 Overflow Interrupt Priority bit
(
)
1
= High priority
0
= Low priority
bit 2
TMR6IP:
TMR6 to PR6 Match Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
TMR5IP:
TMR5 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
bit 0
TMR4IP:
TMR4 to PR4 Match Interrupt Priority bit
1
= High priority
0
= Low priority
Note 1:
Unimplemented on devices with a program memory of 32 Kbytes (PIC18FX5K22).