Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
PIC18F87K22 FAMILY
DS39960D-page 198
2009-2011 Microchip Technology Inc.
14.1
Timer1 Gate Control Register
, is used to control the
Timer1 gate.
REGISTER 14-2:
T1GCON: TIMER1 GATE CONTROL REGISTER
(
)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R-x
R/W-0
R/W-0
TMR1GE
T1GPOL
T1GTM
T1GSPM
T1GGO/T1DONE
T1GVAL
T1GSS1
T1GSS0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TMR1GE:
Timer1 Gate Enable bit
If TMR1ON = 0:
This bit is ignored.
If TMR1ON = 1:
1
This bit is ignored.
If TMR1ON = 1:
1
= Timer1 counting is controlled by the Timer1 gate function
0
= Timer1 counts regardless of Timer1 gate function
bit 6
T1GPOL:
Timer1 Gate Polarity bit
1
= Timer1 gate is active-high (Timer1 counts when gate is high)
0
= Timer1 gate is active-low (Timer1 counts when gate is low)
bit 5
T1GTM:
Timer1 Gate Toggle Mode bit
1
= Timer1 Gate Toggle mode is enabled
0
= Timer1 Gate Toggle mode is disabled and toggle flip-flop is cleared
Timer1 gate flip-flop toggles on every rising edge.
bit 4
T1GSPM:
Timer1 Gate Single Pulse Mode bit
1
= Timer1 Gate Single Pulse mode is enabled and is controlling Timer1 gate
0
= Timer1 Gate Single Pulse mode is disabled
bit 3
T1GGO/T1DONE:
Timer1 Gate Single Pulse Acquisition Status bit
1
= Timer1 gate single pulse acquisition is ready, waiting for an edge
0
= Timer1 gate single pulse acquisition has completed or has not been started
This bit is automatically cleared when T1GSPM is cleared.
bit 2
T1GVAL:
Timer1 Gate Current State bit
Indicates the current state of the Timer1 gate that could be provided to TMR1H:TMR1L; unaffected by
Timer1 Gate Enable (TMR1GE) bit.
Timer1 Gate Enable (TMR1GE) bit.
bit 1-0
T1GSS<1:0>:
Timer1 Gate Source Select bits
11
= Comparator 2 output
10
= Comparator 1 output
01
= TMR2 to match PR2 output
00
= Timer1 gate pin
Note 1:
Programming the T1GCON prior to T1CON is recommended.