Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
PIC18F87K22 FAMILY
DS39960D-page 272
2009-2011 Microchip Technology Inc.
FIGURE 20-11:
EXAMPLE OF PWM DIRECTION CHANGE AT NEAR 100% DUTY CYCLE
(1)
20.4.3
START-UP CONSIDERATIONS
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCPxM<1:0> bits of the CCPxCON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (PxA/PxC and PxB/PxD). The PWM output
polarities must be selected before the PWM pin output
drivers are enabled. Changing the polarity configura-
tion while the PWM pin output drivers are enabled is
not recommended since it may result in damage to the
application circuits.
The PxA, PxB, PxC and PxD output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (PxA/PxC and PxB/PxD). The PWM output
polarities must be selected before the PWM pin output
drivers are enabled. Changing the polarity configura-
tion while the PWM pin output drivers are enabled is
not recommended since it may result in damage to the
application circuits.
The PxA, PxB, PxC and PxD output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMR2IF or TMR4IF bit of the PIR1
or PIR5 register being set as the second PWM period
begins.
pin output drivers. The completion of a full PWM cycle
is indicated by the TMR2IF or TMR4IF bit of the PIR1
or PIR5 register being set as the second PWM period
begins.
20.4.4
ENHANCED PWM
AUTO-SHUTDOWN MODE
AUTO-SHUTDOWN MODE
The PWM mode supports an Auto-Shutdown mode that
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
ECCPxAS<2:0> bits (ECCPxAS<6:4>). A shutdown
event may be generated by:
• A logic ‘0’ on the pin that is assigned the FLT0
will disable the PWM outputs when an external
shutdown event occurs. Auto-Shutdown mode places
the PWM output pins into a predetermined state. This
mode is used to help prevent the PWM from damaging
the application.
The auto-shutdown sources are selected using the
ECCPxAS<2:0> bits (ECCPxAS<6:4>). A shutdown
event may be generated by:
• A logic ‘0’ on the pin that is assigned the FLT0
input function
• C1 Comparator
• C2 Comparator
• Setting the ECCPxASE bit in firmware
A shutdown condition is indicated by the ECCPxASE
(Auto-Shutdown Event Status) bit (ECCPxAS<7>). If
the bit is a ‘0’, the PWM pins are operating normally. If
the bit is a ‘1’, the PWM outputs are in the shutdown
state.
• C2 Comparator
• Setting the ECCPxASE bit in firmware
A shutdown condition is indicated by the ECCPxASE
(Auto-Shutdown Event Status) bit (ECCPxAS<7>). If
the bit is a ‘0’, the PWM pins are operating normally. If
the bit is a ‘1’, the PWM outputs are in the shutdown
state.
Forward Period
Reverse Period
PxA
T
ON(2)
T
OFF(3)
T = T
OFF
– T
ON(2,3)
PxB
PxC
PxD
External Switch D
Potential
Shoot-Through Current
Note 1:
All signals are shown as active-high.
2:
T
ON
is the turn-on delay of power switch, QC, and its driver.
3:
T
OFF
is the turn-off delay of power switch, QD, and its driver.
External Switch C
t1
PW
PW
Note:
When the microcontroller is released from
Reset, all of the I/O pins are in the
high-impedance state. The external
circuits must keep the power switch
devices in the OFF state until the micro-
controller drives the I/O pins with the
proper signal levels or activates the PWM
output(s).
Reset, all of the I/O pins are in the
high-impedance state. The external
circuits must keep the power switch
devices in the OFF state until the micro-
controller drives the I/O pins with the
proper signal levels or activates the PWM
output(s).