Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet
Product codes
PIC18F87K22-I/PTRSL
2009-2011 Microchip Technology Inc.
DS39960D-page 315
PIC18F87K22 FAMILY
21.4.8
I
2
C™ MASTER MODE START
CONDITION TIMING
To initiate a Start condition, the user sets the Start
Enable bit, SEN (SSPxCON2<0>). If the SDAx and
SCLx pins are sampled high, the Baud Rate Generator
is reloaded with the contents of SSPxADD<6:0> and
starts its count. If SCLx and SDAx are both sampled
high when the Baud Rate Generator times out (T
Enable bit, SEN (SSPxCON2<0>). If the SDAx and
SCLx pins are sampled high, the Baud Rate Generator
is reloaded with the contents of SSPxADD<6:0> and
starts its count. If SCLx and SDAx are both sampled
high when the Baud Rate Generator times out (T
BRG
),
the SDAx pin is driven low. The action of the SDAx
being driven low while SCLx is high is the Start condi-
tion and causes the S bit (SSPxSTAT<3>) to be set.
Following this, the Baud Rate Generator is reloaded
with the contents of SSPxADD<6:0> and resumes its
count. When the Baud Rate Generator times out
(T
being driven low while SCLx is high is the Start condi-
tion and causes the S bit (SSPxSTAT<3>) to be set.
Following this, the Baud Rate Generator is reloaded
with the contents of SSPxADD<6:0> and resumes its
count. When the Baud Rate Generator times out
(T
BRG
), the SEN bit (SSPxCON2<0>) will be
automatically cleared by hardware. The Baud Rate
Generator is suspended, leaving the SDAx line held low
and the Start condition is complete.
Generator is suspended, leaving the SDAx line held low
and the Start condition is complete.
21.4.8.1
WCOL Status Flag
If the user writes the SSPxBUF when a Start sequence
is in progress, the WCOL bit is set and the contents of
the buffer are unchanged (the write doesn’t occur).
is in progress, the WCOL bit is set and the contents of
the buffer are unchanged (the write doesn’t occur).
FIGURE 21-21:
FIRST START BIT TIMING
Note:
If, at the beginning of the Start condition,
the SDAx and SCLx pins are already
sampled low, or if during the Start condi-
tion, the SCLx line is sampled low before
the SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
the SDAx and SCLx pins are already
sampled low, or if during the Start condi-
tion, the SCLx line is sampled low before
the SDAx line is driven low, a bus collision
occurs, the Bus Collision Interrupt Flag,
BCLxIF, is set, the Start condition is
aborted and the I
2
C module is reset into its
Idle state.
Note:
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPxCON2 is disabled until the Start
condition is complete.
allowed, writing to the lower 5 bits of
SSPxCON2 is disabled until the Start
condition is complete.
SDAx
SCLx
S
T
BRG
1st bit
2nd bit
T
BRG
SDAx = 1,
At Completion of Start bit,
SCLx = 1
Write to SSPxBUF Occurs Here
T
BRG
Hardware Clears SEN bit
T
BRG
Write to SEN bit Occurs Here
Set S bit (SSPxSTAT<3>)
and Sets SSPxIF bit