Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet

Product codes
PIC18F87K22-I/PTRSL
Page of 550
 2009-2011 Microchip Technology Inc.
DS39960D-page 373
PIC18F87K22 FAMILY
24.6
Comparator Interrupts
The comparator interrupt flag is set whenever any of
the following occurs:
• Low-to-high transition of the comparator output
• High-to-low transition of the comparator output
• Any change in the comparator output
The comparator interrupt selection is done by the
EVPOL<1:0> bits in the CMxCON register
(CMxCON<4:3>).
In order to provide maximum flexibility, the output of the
comparator may be inverted using the CPOL bit in the
CMxCON register (CMxCON<5>). This is functionally
identical to reversing the inverting and non-inverting
inputs of the comparator for a particular mode. 
An interrupt is generated on the low-to-high or high-to-
low transition of the comparator output. This mode of
interrupt generation is dependent on EVPOL<1:0> in
the CMxCON register. When EVPOL<1:0> = 01 or 10,
the interrupt is generated on a low-to-high or high-to-
low transition of the comparator output. Once the
interrupt is generated, it is required to clear the interrupt
flag by software.
When EVPOL<1:0> = 11, the comparator interrupt flag
is set whenever there is a change in the output value of
either comparator. Software will need to maintain
information about the status of the output bits, as read
from CMSTAT<7:5>, to determine the actual change
that occurred.
The CMPxIF bits (PIR6<2:0>) are the Comparator
Interrupt Flags. The CMPxIF bits must be reset by
clearing them. Since it is also possible to write a ‘1’ to
this register, a simulated interrupt may be initiated.
 shows the interrupt generation with respect
to comparator input voltages and EVPOL bit settings.
Both the CMPxIE bits (PIE6<2:0>) and the PEIE bit
(INTCON<6>) must be set to enable the interrupt. In
addition, the GIE bit (INTCON<7>) must also be set. If
any of these bits are clear, the interrupt is not enabled,
though the CMPxIF bits will still be set if an interrupt
condition occurs.
A simplified diagram of the interrupt section is shown in
TABLE 24-2:
COMPARATOR INTERRUPT GENERATION
Note:
The CMPxIF bits will not be set when
EVPOL<1:0> = 00.
CPOL
EVPOL<1:0>
Comparator
Input Change
CxOUT Transition
Interrupt
Generated
0
00
V
IN
+ > V
IN
-
Low-to-High
No
V
IN
+ < V
IN
-
High-to-Low
No
01
V
IN
+ > V
IN
-
Low-to-High
Yes
V
IN
+ < V
IN
-
High-to-Low
No
10
V
IN
+ > V
IN
-
Low-to-High
No
V
IN
+ < V
IN
-
High-to-Low
Yes
11
V
IN
+ > V
IN
-
Low-to-High
Yes
V
IN
+ < V
IN
-
High-to-Low
Yes
1
00
V
IN
+ > V
IN
-
High-to-Low
No
V
IN
+ < V
IN
-
Low-to-High
No
01
V
IN
+ > V
IN
-
High-to-Low
No
V
IN
+ < V
IN
-
Low-to-High
Yes
10
V
IN
+ > V
IN
-
High-to-Low
Yes
V
IN
+ < V
IN
-
Low-to-High
No
11
V
IN
+ > V
IN
-
High-to-Low
Yes
V
IN
+ < V
IN
-
Low-to-High
Yes