Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet

DS39960D-page 376

 2009-2011 Microchip Technology Inc.

The full range of voltage reference cannot be realized
due to the construction of the module. The transistors
on the top and bottom of the resistor ladder network
(

) keep CV

REF

 from approaching the refer-

ence source rails. The voltage reference is derived
from the reference source; therefore, the CV

REF

 output

changes with fluctuations in that source. The tested
absolute accuracy of the voltage reference can be
found in 

When the device wakes up from Sleep through an
interrupt or a Watchdog Timer time-out, the contents of
the CVRCON register are not affected. To minimize
current consumption in Sleep mode, the voltage
reference should be disabled.

A device Reset disables the voltage reference by
clearing bit, CVREN (CVRCON<7>). This Reset also
disconnects the reference from the RF5 pin by clearing
bit, CVROE (CVRCON<6>).

The voltage reference module operates independently
of the comparator module. The output of the reference
generator may be connected to the RF5 pin if the
CVROE bit is set. Enabling the voltage reference out-
put onto RF5 when it is configured as a digital input will
increase current consumption. Connecting RF5 as a
digital output, with CVRSS enabled, will also increase
current consumption.
The RF5 pin can be used as a simple D/A output with
limited drive capability. Due to the limited current drive
capability, a buffer must be used on the voltage
reference output for external connections to V

REF

.

 shows an example buffering technique.

32-

to

-1 MUX

CVR<4:0>

R

CVREN

CVRSS = 

0

AV

DD

V

REF

+

CVRSS = 

1

 

R

R

R

R

R

R

32 Steps

CV

REF

V

REF

-

CVRSS = 

1

 

CVRSS = 

0