Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL Data Sheet

DS39960D-page 78

 2009-2011 Microchip Technology Inc.

Most registers are unaffected by a Reset. Their status
is unknown on POR and unchanged by all other
Resets. The other registers are forced to a “Reset
state” depending on the type of Reset that occurred. 
Most registers are not affected by a WDT wake-up,
since this is viewed as the resumption of normal
operation. Status bits from the RCON register (CM, RI,
TO, PD, POR and BOR) are set or cleared differently in

different Reset situations, as indicated in 

These bits are used in software to determine the nature
of the Reset. 

 describes the Reset states for all of the

Special Function Registers. These are categorized by
Power-on and Brown-out Resets, Master Clear and
WDT Resets, and WDT wake-ups.

 

Power-on Reset

0000h

1

1

1

1

0

0

0

0

RESET

 instruction

0000h

u

0

u

u

u

u

u

u

Brown-out Reset

0000h

1

1

1

1

u

0

u

u

Configuration Mismatch Reset

0000h

0

u

u

u

u

u

u

u

MCLR Reset during 
power-managed Run modes

0000h

u

u

1

u

u

u

u

u

MCLR Reset during power-
managed Idle modes and 
Sleep mode

0000h

u

u

1

0

u

u

u

u

MCLR Reset during full-power 
execution

0000h

u

u

u

u

u

u

u

u

Stack Full Reset (STVREN = 1)

0000h

u

u

u

u

u

u

1

u

Stack Underflow Reset 
(STVREN = 1)

0000h

u

u

u

u

u

u

u

1

Stack Underflow Error (not an 
actual Reset, STVREN = 0)

0000h

u

u

u

u

u

u

u

1

WDT time-out during full-power 
or power-managed Run modes

0000h

u

u

0

u

u

u

u

u

WDT time-out during 
power-managed Idle or Sleep 
modes

PC + 2

u

u

0

0

u

u

u

u

Interrupt exit from 
power-managed modes

PC + 2

u

u

u

0

u

u

u

u

Legend: u

 = unchanged

When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the interrupt 
vector (0008h or 0018h).