Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
© 2009 Microchip Technology Inc.
DS39663F-page 135
PIC18F87J10 FAMILY
TABLE 11-9:
PORTD FUNCTIONS
Pin Name
Function
TRIS
Setting
I/O
I/O Type
Description
RD0/AD0/PSP0
RD0
0
O
DIG
LATD<0> data output.
1
I
ST
PORTD<0> data input.
AD0
(2)
x
O
DIG
External memory interface, address/data bit 0 output.
(1)
x
I
TTL
External memory interface, data bit 0 input.
(1)
PSP0
O
DIG
PSP read output data (LATD<0>); takes priority over port data.
I
TTL
PSP write data input.
RD1/AD1/PSP1
RD1
0
O
DIG
LATD<1> data output.
1
I
ST
PORTD<1> data input.
AD1
(2)
x
O
DIG
External memory interface, address/data bit 1 output.
(1)
x
I
TTL
External memory interface, data bit 1 input.
(1)
PSP1
x
O
DIG
PSP read output data (LATD<1>); takes priority over port data.
x
I
TTL
PSP write data input.
RD2/AD2/PSP2
RD2
0
O
DIG
LATD<2> data output.
1
I
ST
PORTD<2> data input.
AD2
(2)
x
O
DIG
External memory interface, address/data bit 2 output.
(1)
x
I
TTL
External memory interface, data bit 2 input.
(1)
PSP2
x
O
DIG
PSP read output data (LATD<2>); takes priority over port data.
x
I
TTL
PSP write data input.
RD3/AD3/PSP3
RD3
0
O
DIG
LATD<3> data output.
1
I
ST
PORTD<3> data input.
AD3
(2)
x
O
DIG
External memory interface, address/data bit 3 output.
(1)
x
I
TTL
External memory interface, data bit 3 input.
(1)
PSP3
x
O
DIG
PSP read output data (LATD<3>); takes priority over port data.
x
I
TTL
PSP write data input.
RD4/AD4/
PSP4/SDO2
PSP4/SDO2
RD4
0
O
DIG
LATD<4> data output.
1
I
ST
PORTD<4> data input.
AD4
(2)
x
O
DIG
External memory interface, address/data bit 4 output.
(1)
x
I
TTL
External memory interface, data bit 4 input.
(1)
PSP4
x
O
DIG
PSP read output data (LATD<4>); takes priority over port data.
x
I
TTL
PSP write data input.
SDO2
0
O
DIG
SPI data output (MSSP2 module); takes priority over port data.
RD5/AD5/
PSP5/SDI2/
SDA2
PSP5/SDI2/
SDA2
RD5
0
O
DIG
LATD<5> data output.
1
I
ST
PORTD<5> data input.
AD5
(2)
x
O
DIG
External memory interface, address/data bit 5 output.
(1)
x
I
TTL
External memory interface, data bit 5 input.
(1)
PSP5
x
O
DIG
PSP read output data (LATD<5>); takes priority over port data.
x
I
TTL
PSP write data input.
SDI2
1
I
ST
SPI data input (MSSP2 module).
SDA2
1
O
DIG
I
2
C™ data output (MSSP2 module); takes priority over port data.
1
I
I
2
C/SMB I
2
C data input (MSSP2 module); input type depends on module
setting.
Legend:
PWR = Power Supply, O = Output, I = Input, I
2
C™/SMB = I
2
C/SMBus input buffer, ANA = Analog Signal, DIG = Digital
Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is
overridden for this option).
overridden for this option).
Note 1:
External memory interface I/O takes priority over all other digital and PSP I/O.
2:
Available on 80-pin devices only.