Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
PIC18F87J10 FAMILY
DS39663F-page 164
© 2009 Microchip Technology Inc.
15.1
Timer3 Operation
Timer3 can operate in one of three modes:
• Timer
• Synchronous Counter
• Asynchronous Counter
• Timer
• Synchronous Counter
• Asynchronous Counter
The operating mode is determined by the clock select
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
bit, TMR3CS (T3CON<1>). When TMR3CS is cleared
(= 0), Timer3 increments on every internal instruction
cycle (F
OSC
/4). When the bit is set, Timer3 increments
on every rising edge of the Timer1 external clock input
or the Timer1 oscillator, if enabled.
As with Timer1, the RC1/T1OSI and
RC0/T1OSO/T13CKI pins become inputs when the
Timer1 oscillator is enabled. This means the values of
TRISC<1:0> are ignored and the pins are read as ‘0’.
or the Timer1 oscillator, if enabled.
As with Timer1, the RC1/T1OSI and
RC0/T1OSO/T13CKI pins become inputs when the
Timer1 oscillator is enabled. This means the values of
TRISC<1:0> are ignored and the pins are read as ‘0’.
FIGURE 15-1:
TIMER3 BLOCK DIAGRAM
FIGURE 15-2:
TIMER3 BLOCK DIAGRAM (16-BIT READ/WRITE MODE)
T3SYNC
TMR3CS
T3CKPS<1:0>
Sleep Input
T1OSCEN
(1)
F
OSC
/4
Internal
Clock
Prescaler
1, 2, 4, 8
Synchronize
Detect
1
0
2
T1OSO/T13CKI
T1OSI
1
0
TMR3ON
TMR3L
Set
TMR3IF
on Overflow
TMR3
High Byte
Timer1 Oscillator
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
On/Off
Timer3
CCPx Special Event Trigger
CCPx Select from T3CON<6,3>
Clear TMR3
Timer1 Clock Input
T3SYNC
TMR3CS
T3CKPS<1:0>
Sleep Input
T1OSCEN
(1)
F
OSC
/4
Internal
Clock
Prescaler
1, 2, 4, 8
Synchronize
Detect
1
0
2
T13CKI/T1OSO
T1OSI
Note 1: When enable bit, T1OSCEN, is cleared, the inverter and feedback resistor are turned off to eliminate power drain.
1
0
TMR3L
Internal Data Bus
8
Set
TMR3IF
on Overflow
TMR3
TMR3H
High Byte
8
8
8
Read TMR1L
Write TMR1L
8
TMR3ON
CCPx Special Event Trigger
Timer1 Oscillator
On/Off
Timer3
Timer1 Clock Input
CCPx Select from T3CON<6,3>
Clear TMR3