Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet
Product codes
PIC18F65J15-I/PT
© 2009 Microchip Technology Inc.
DS39663F-page 185
PIC18F87J10 FAMILY
18.4.5
FULL-BRIDGE MODE
In Full-Bridge Output mode, four pins are used as
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 18-6.
outputs; however, only two outputs are active at a time.
In the Forward mode, pin P1A is continuously active
and pin P1D is modulated. In the Reverse mode, pin
P1C is continuously active and pin P1B is modulated.
These are illustrated in Figure 18-6.
P1A, P1B, P1C and P1D outputs are multiplexed with
the port pins as described in Table 18-1, Table 18-2
and Table 18-3. The corresponding TRIS bits must be
cleared to make the P1A, P1B, P1C and P1D pins
outputs.
the port pins as described in Table 18-1, Table 18-2
and Table 18-3. The corresponding TRIS bits must be
cleared to make the P1A, P1B, P1C and P1D pins
outputs.
FIGURE 18-6:
FULL-BRIDGE PWM OUTPUT
Period
Duty Cycle
P1A
(2)
P1B
(2)
P1C
(2)
P1D
(2)
Forward Mode
(1)
Period
Duty Cycle
P1A
(2)
P1C
(2)
P1D
(2)
P1B
(2)
Reverse Mode
(1)
(1)
(1)
Note 1: At this time, the TMR2 register is equal to the PR2 register.
Note
2: The output signal is shown as active-high.