Microchip Technology IC PIC MCU PIC18F65J15-I/PT TQFP-64 MCP PIC18F65J15-I/PT Data Sheet

Product codes
PIC18F65J15-I/PT
Page of 410
PIC18F87J10 FAMILY
DS39663F-page 292
© 2009 Microchip Technology Inc.
24.6
Program Verification and 
Code Protection
For all devices in the PIC18F87J10 family of devices,
the on-chip program memory space is treated as a
single block. Code protection for this block is controlled
by one Configuration bit, CP0. This bit inhibits external
reads and writes to the program memory space. It has
no direct effect in normal execution mode. 
24.6.1
CONFIGURATION REGISTER 
PROTECTION
The Configuration registers are protected against
untoward changes or reads in two ways. The primary
protection is the write-once feature of the Configuration
bits which prevents reconfiguration once the bit has
been programmed during a power cycle. To safeguard
against unpredictable events, Configuration bit
changes resulting from individual cell-level disruptions
(such as ESD events) will cause a parity error and
trigger a device Reset.
The data for the Configuration registers is derived from
the Flash Configuration Words in program memory.
When the CP0 bit set, the source data for device
configuration is also protected as a consequence.
24.7
 In-Circuit Serial Programming
PIC18F87J10 family microcontrollers can be serially
programmed while in the end application circuit. This is
simply done with two lines for clock and data and three
other lines for power, ground and the programming
voltage. This allows customers to manufacture boards
with unprogrammed devices and then program the
microcontroller just before shipping the product. This
also allows the most recent firmware or a custom
firmware to be programmed.
24.8
In-Circuit Debugger
When the DEBUG Configuration bit is programmed to
a ‘0’, the In-Circuit Debugger functionality is enabled.
This function allows simple debugging functions when
used with MPLAB
®
 IDE. When the microcontroller has
this feature enabled, some resources are not available
for general use. Table 24-4 shows which resources are
required by the background debugger.
TABLE 24-4:
DEBUGGER RESOURCES  
I/O pins:
RB6, RB7
Stack:
2 levels
Program Memory:
512 bytes
Data Memory:
10 bytes