Microchip Technology DM164130-9 User Manual
PIC® MCU Architecture
2012 Microchip Technology Inc.
DS41628B-page 31
When using the PIC16F1829 in assembly, the reader will be constantly referring back
to
to
to make sure that the right bank is selected before writing to an SFR.
For PIC18 devices, the banking situation was streamlined so that the user does not
have to switch banks when using the access SFRs. The data memory is configured
with an Access Bank, which allows users to access a mapped block of memory without
specifying a Bank Select Register (BSR). The Access Bank consists of the first 96
bytes of memory in Bank 0 and the last 160 bytes of memory in Bank Block 15. This
lower half is known as the “Access RAM” and is composed of GPRs. The upper half is
where the device’s SFRs are mapped (Bank 15). When going through the assembly
lessons, the reader will notice the absence of bank switching.
have to switch banks when using the access SFRs. The data memory is configured
with an Access Bank, which allows users to access a mapped block of memory without
specifying a Bank Select Register (BSR). The Access Bank consists of the first 96
bytes of memory in Bank 0 and the last 160 bytes of memory in Bank Block 15. This
lower half is known as the “Access RAM” and is composed of GPRs. The upper half is
where the device’s SFRs are mapped (Bank 15). When going through the assembly
lessons, the reader will notice the absence of bank switching.
and
show this improved mapping scheme.