Microchip Technology MCP3425EV Data Sheet

Page of 38
© 2009 Microchip Technology Inc.
DS22072B-page 7
MCP3425
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in 
TABLE 3-1:
PIN FUNCTION TABLE  
3.1
 
Analog Inputs (V
IN
+, V
IN
-)
V
IN
+ and V
IN
- are differential signal input pins. The
MCP3425 device accepts a fully differential analog
input signal which is connected on the V
IN
+ and V
IN
-
input pins. The differential voltage that is converted is
defined by V
IN
 = (V
IN
+ - V
IN
-) where V
IN
+ is the voltage
applied at the V
IN
+ pin and V
IN
- is the voltage applied
at the V
IN
- pin. The input signal level is amplified by the
programmable gain amplifier (PGA) before the
conversion. The differential input voltage should not
exceed an absolute of (V
REF
/PGA) for accurate
measurement, where V
REF
 is the internal reference
voltage (2.048V) and PGA is the PGA gain setting. The
converter output code will saturate if the input range
exceeds (V
REF
/PGA).
The absolute voltage range on each of the differential
input pins is from V
SS
-0.3V to V
DD
+0.3V. Any voltage
above or below this range will cause leakage currents
through the Electrostatic Discharge (ESD) diodes at
the input pins. This ESD current can cause unexpected
performance of the device. The common mode of the
analog inputs should be chosen such that both the
differential analog input range and the absolute voltage
range on each pin are within the specified operating
range defined in Section 1.0 “Electrical
Characteristics”
 and Section 4.0 “Description of
Device Operation”
.
3.2
 
Supply Voltage (V
DD
, V
SS
)
V
DD
 is the power supply pin for the device. This pin
requires an appropriate bypass capacitor of about
0.1 µF (ceramic) to ground. An additional 10 µF
capacitor (tantalum) in parallel is also recommended
to further attenuate high frequency noise present in
some application boards. The supply voltage (V
DD
)
must be maintained in the 2.7V to 5.5V range for
specified operation. 
V
SS
 is the ground pin and the current return path of the
device. The user must connect the V
SS
 pin to a ground
plane through a low impedance connection. If an
analog ground path is available in the application PCB
(printed circuit board), it is highly recommended that
the V
SS
 pin be tied to the analog ground path or
isolated within an analog ground plane of the circuit
board. 
3.3
 
Serial Clock Pin (SCL)
SCL is the serial clock pin of the I
2
C interface. The
MCP3425 acts only as a slave and the SCL pin
accepts only external serial clocks. The input data
from the Master device is shifted into the SDA pin on
the rising edges of the SCL clock and output from the
MCP3425 occurs at the falling edges of the SCL clock.
The SCL pin is an open-drain N-channel driver.
Therefore, it needs a pull-up resistor from the V
DD
 line
to the SCL pin. Refer to Section 5.3 “I
munications” for more details of I
2
C Serial Interface
communication.
3.4
 
Serial Data Pin (SDA)
SDA is the serial data pin of the I
2
C interface. The SDA
pin is used for input and output data. In read mode, the
conversion result is read from the SDA pin (output). In
write mode, the device configuration bits are written
(input) though the SDA pin. The SDA pin is an open-
drain N-channel driver. Therefore, it needs a pull-up
resistor from the V
DD
 line to the SDA pin. Except for
start and stop conditions, the data on the SDA pin must
be stable during the high period of the clock. The high
or low state of the SDA pin can only change when the
clock signal on the SCL pin is low. Refer to Section 5.3
“I
C Serial Communications” for more details of I
2
C
Serial Interface communication.
MCP3425
Symbol
Definition
SOT-23-6
1
V
IN
+
Positive Differential Analog Input Pin
2
V
SS
Ground Pin
3
SCL
Serial Clock Input Pin of the I
2
C Interface
4
SDA
Bidirectional Serial Data Pin of the I
2
C Interface
5
V
DD
Positive Supply Voltage Pin
6
V
IN
-
Negative Differential Analog Input Pin