Microchip Technology MCP3425EV Data Sheet

© 2009 Microchip Technology Inc.

DS22072B-page 9

The MCP3425 is a low-power, 16-Bit Delta-Sigma A/D
converter with an I

2

C serial interface. The device

contains an on-board voltage reference (2.048V),
programmable gain amplifier (PGA), and internal
oscillator. The user can select 12, 14, or 16 bit
conversion by setting the configuration register bits.
The device can be operated in Continuous Conversion
or One-Shot Conversion mode. In the Continuous
Conversion mode, the device converts the inputs
continuously. While in the One-Shot Conversion mode,
the device converts the input one time and stays in the
low-power standby mode until it receives another
command for a new conversion. During the standby
mode, the device consumes less than 0.1 µA typical.
When the device powers up (POR is set), it
automatically resets the configuration bits to default
settings. 

• Conversion bit resolution: 12 bits (240 sps)

• PGA gain setting: x1

• Continuous conversion 

Once the device is powered-up, the user can
reprogram the configuration bits using I

2

C serial

interface any time. The configuration bits are stored in
volatile memory. 

• Conversion bit resolution: 12, 14, or 16 bits

• PGA Gain selection: x1, x2, x4, or x8

• Continuous or one-shot conversion 

In the Continuous Conversion mode, the device
converts the inputs continuously. While in the One-Shot
Conversion mode, the device converts the input one
time and stays in the low-power standby mode until it
receives another command for a new conversion.
During the standby mode, the device consumes less
than 1 µA maximum.

The device contains an internal Power-On-Reset
(POR) circuit that monitors power supply voltage (V

DD

)

during operation. This circuit ensures correct device
start-up at system power-up and power-down events.
The POR has built-in hysteresis and a timer to give a
high degree of immunity to potential ripples and noises
on the power supply. A 0.1 µF decoupling capacitor
should be mounted as close as possible to the V

DD

 pin

for additional transient immunity. 

The threshold voltage is set at 2.2V with a tolerance of
approximately ±5%. If the supply voltage falls below
this threshold, the device will be held in a reset
condition. The typical hysteresis value is approximately
200 mV.

The POR circuit is shut-down during the low-power
standby mode. Once a power-up event has occurred,
the device requires additional delay time
(approximately 300 µs) before a conversion can take
place. During this time, all internal analog circuitries are
settled before the first conversion occurs. 

illustrates the conditions for power-up and power-down
events under typical start-up conditions. 

When the device powers up, it automatically resets
and sets the configuration bits to default settings. The
default configuration bit conditions are a PGA gain of
1 V/V and a conversion speed of 240 SPS in
Continuous Conversion mode. When the device
receives an I

2

C General Call Reset command, it

performs an internal reset similar to a Power-On-Reset
event.

 

The device contains an on-board 2.048V voltage
reference. This reference voltage is for internal use
only and not directly measurable. The specifications of
the reference voltage are part of the device’s gain and
drift specifications. Therefore, there is no separate
specification for the on-board reference.

The differential analog input channel has a switched
capacitor structure. The internal sampling capacitor
(3.2 pF for PGA = 1) is charged and discharged to
process a conversion. The charging and discharging of
the input sampling capacitor creates dynamic input
currents at each input pin. The current is a function of
the differential input voltages, and inversely
proportional to the internal sampling capacitance,
sampling frequency, and PGA setting. 

V

DD

2.2V

2.0V

300 µS

Reset Start-up

Normal Operation

Reset

Time