Microchip Technology MCP9800DM-DL2 Data Sheet
2004-2013 Microchip Technology Inc.
DS40001239E-page 49
PIC10F200/202/204/206
FIGURE 9-9:
BROWN-OUT
PROTECTION CIRCUIT 3
PROTECTION CIRCUIT 3
9.9
Power-Down Mode (Sleep)
A device may be powered down (Sleep) and later
powered up (wake-up from Sleep).
powered up (wake-up from Sleep).
9.9.1
SLEEP
The Power-Down mode is entered by executing a
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low or high-impedance).
SLEEP instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low or high-impedance).
For lowest current consumption while powered down,
the T0CKI input should be at V
the T0CKI input should be at V
DD
or V
SS
and the GP3/
MCLR/V
PP
pin must be at a logic high level if MCLR is
enabled.
9.9.2
WAKE-UP FROM SLEEP
The device can wake-up from Sleep through one of
the following events:
1.
the following events:
1.
An external Reset input on GP3/MCLR/V
PP
pin,
when configured as MCLR.
2.
A Watchdog Timer time-out Reset (if WDT was
enabled).
enabled).
3.
A change on input pin GP0, GP1 or GP3 when
wake-up on change is enabled.
wake-up on change is enabled.
4.
A comparator output change has occurred when
wake-up on comparator change is enabled.
wake-up on comparator change is enabled.
These events cause a device Reset. The TO, PD
GPWUF and CWUF bits can be used to determine the
cause of device Reset. The TO bit is cleared if a WDT
time-out occurred (and caused wake-up). The PD bit,
which is set on power-up, is cleared when SLEEP is
invoked. The GPWUF bit indicates a change in state
while in Sleep at pins GP0, GP1 or GP3 (since the last
file or bit operation on GP port). The CWUF bit
indicates a change in the state while in Sleep of the
comparator output.
GPWUF and CWUF bits can be used to determine the
cause of device Reset. The TO bit is cleared if a WDT
time-out occurred (and caused wake-up). The PD bit,
which is set on power-up, is cleared when SLEEP is
invoked. The GPWUF bit indicates a change in state
while in Sleep at pins GP0, GP1 or GP3 (since the last
file or bit operation on GP port). The CWUF bit
indicates a change in the state while in Sleep of the
comparator output.
Note:
A Reset generated by a WDT time-out
does not drive the MCLR pin low.
does not drive the MCLR pin low.
Note:
This brown-out protection circuit employs
Microchip Technology’s MCP809 micro-
controller supervisor. There are 7 different
trip point selections to accommodate 5V to
3V systems.
Microchip Technology’s MCP809 micro-
controller supervisor. There are 7 different
trip point selections to accommodate 5V to
3V systems.
MCLR
PIC10F20X
V
DD
V
DD
V
SS
RST
MCP809
V
DD
Bypass
Capacitor
Note:
Caution: Right before entering Sleep,
read the input pins. When in Sleep, wake-
up occurs when the values at the pins
change from the state they were in at the
last reading. If a wake-up on change
occurs and the pins are not read before re-
entering Sleep, a wake-up will occur
immediately even if no pins change while
in Sleep mode.
read the input pins. When in Sleep, wake-
up occurs when the values at the pins
change from the state they were in at the
last reading. If a wake-up on change
occurs and the pins are not read before re-
entering Sleep, a wake-up will occur
immediately even if no pins change while
in Sleep mode.
Note:
The WDT is cleared when the device
wakes from Sleep, regardless of the wake-
up source.
wakes from Sleep, regardless of the wake-
up source.