Microchip Technology Microstick for the 5V PIC24F K-series DM240013-2 DM240013-2 Data Sheet
Product codes
DM240013-2
PIC24FV16KM204 FAMILY
DS30003030B-page 230
2013 Microchip Technology Inc.
REGISTER 20-1:
DACxCON: DACx CONTROL REGISTER
R/W-0
U-0
R/W-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
DACEN
—
DACSIDL
DACSLP
DACFM
—
SRDIS
DACTRIG
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
DACOE
DACTSEL4
DACTSEL3
DACTSEL2
DACTSEL1
DACTSEL0
DACREF1
DACREF0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
DACEN:
DACx Enable bit
1
= Module is enabled
0
= Module is disabled
bit 14
Unimplemented:
Read as ‘0’
bit 13
DACSIDL:
DACx Stop in Idle Mode bit
1
= Discontinues module operation when device enters Idle mode
0
= Continues module operation in Idle mode
bit 12
DACSLP:
DACx Enable Peripheral During Sleep bit
1
= DACx continues to output the most recent value of DACxDAT during Sleep mode
0
= DACx is powered down in Sleep mode; DACxOUT pin is controlled by the TRISx and LATx bits
bit 11
DACFM:
DACx Data Format Select bit
1
= Data is left justified (data stored in DACxDAT<15:8>)
0
= Data is right justified (data stored in DACxDAT<7:0>)
bit 10
Unimplemented:
Read as ‘0’
bit 9
SRDIS:
Soft Reset Disable bit
1
= DACxCON and DACxDAT SFRs reset only on a POR or BOR Reset
0
= DACxCON and DACxDAT SFRs reset on any type of device Reset
bit 8
DACTRIG:
DACx Trigger Input Enable bit
1
= Analog output value updates when the selected (by DACTSEL<4:0>) event occurs
0
= Analog output value updates as soon as DACxDAT is written (DAC Trigger is ignored)
bit 7
DACOE:
DACx Output Enable bit
1
= DACx output pin is enabled and driven on the DACxOUT pin
0
= DACx output pin is disabled, DACx output is available internally to other peripherals only
Note 1:
BGBUF1 voltage is configured by BUFREF<1:0> (BUFCON0<1:0>).