Microchip Technology Microstick for the 5V PIC24F K-series DM240013-2 DM240013-2 Data Sheet
Product codes
DM240013-2
2013 Microchip Technology Inc.
DS30003030B-page 43
PIC24FV16KM204 FAMILY
4.2
Data Address Space
The PIC24F core has a separate, 16-bit-wide data
memory space, addressable as a single linear range.
The Data Space is accessed using two Address
Generation Units (AGUs), one each for read and write
operations. The Data Space memory map is displayed
in
memory space, addressable as a single linear range.
The Data Space is accessed using two Address
Generation Units (AGUs), one each for read and write
operations. The Data Space memory map is displayed
in
.
All Effective Addresses (EAs) in the data memory space
are 16 bits wide and point to bytes within the Data
Space. This gives a Data Space address range of
64 Kbytes or 32K words. The lower half of the data
memory space (that is, when EA<15> = 0) is used for
implemented memory addresses, while the upper half
(EA<15> = 1) is reserved for the Program Space Visibil-
ity (PSV) area (see
are 16 bits wide and point to bytes within the Data
Space. This gives a Data Space address range of
64 Kbytes or 32K words. The lower half of the data
memory space (that is, when EA<15> = 0) is used for
implemented memory addresses, while the upper half
(EA<15> = 1) is reserved for the Program Space Visibil-
ity (PSV) area (see
Depending on the particular device, PIC24FV16KM
family devices implement either 512 or 1024 words of
data memory. Should an EA point to a location outside
of this area, an all zero word or byte will be returned.
family devices implement either 512 or 1024 words of
data memory. Should an EA point to a location outside
of this area, an all zero word or byte will be returned.
4.2.1
DATA SPACE WIDTH
The data memory space is organized in
byte-addressable, 16-bit-wide blocks. Data is aligned in
data memory and registers as 16-bit words, but all the
Data Space EAs resolve to bytes. The Least Significant
Bytes (LSBs) of each word have even addresses, while
the Most Significant Bytes (MSBs) have odd
addresses.
byte-addressable, 16-bit-wide blocks. Data is aligned in
data memory and registers as 16-bit words, but all the
Data Space EAs resolve to bytes. The Least Significant
Bytes (LSBs) of each word have even addresses, while
the Most Significant Bytes (MSBs) have odd
addresses.
FIGURE 4-3:
DATA SPACE MEMORY MAP FOR PIC24FXXXXX FAMILY DEVICES
(
0000h
07FEh
07FEh
FFFEh
LSB
Address
LSB
MSB
MSB
Address
0001h
07FFh
0BFFh
(2)
FFFFh
8001h
8000h
7FFFh
0801h
0800h
Near
0BFEh
(2)
SFR
SFR Space
7FFFh
Program Space
Visibility Area
Note
1:
Upper data memory boundary for PIC24FXXKM10X devices.
2:
Upper data memory boundary for PIC24FXXKM20X devices.
3:
Data memory areas are not shown to scale.
1FFEh
1FFFh
Space
Data Space
Implemented
Data RAM
Unimplemented
Read as ‘0’
09FFh
(1)
09FEh
(1)
Data RAM