Microchip Technology MA180025 Data Sheet
2010 Microchip Technology Inc.
DS39933D-page 135
PIC18F87J90 FAMILY
10.9
PORTH, LATH and
TRISH Registers
TRISH Registers
PORTH is an 8-bit wide, bidirectional I/O port. The
corresponding Data Direction and Output Latch registers
are TRISH and LATH. All pins are digital only and
tolerate voltages up to 5.5V.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
All PORTH pins are multiplexed with LCD segment
drives controlled by the LCDSE5 register. I/O port
functions are only available when the segments are
disabled.
corresponding Data Direction and Output Latch registers
are TRISH and LATH. All pins are digital only and
tolerate voltages up to 5.5V.
All pins on PORTH are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
All PORTH pins are multiplexed with LCD segment
drives controlled by the LCDSE5 register. I/O port
functions are only available when the segments are
disabled.
EXAMPLE 10-8:
INITIALIZING PORTH
Note:
PORTH is available only on PIC18F8XJ90
devices.
devices.
CLRF
PORTH
; Initialize PORTH by
; clearing output
; data latches
CLRF
LATH
; Alternate method
; to clear output
; data latches
MOVLW
0Fh
; Configure PORTH as
MOVWF
ADCON1
; digital I/O
MOVLW
0CFh
; Value used to
; initialize data
; direction
MOVWF
TRISH
; Set RH3:RH0 as inputs
; RH5:RH4 as outputs
; RH7:RH6 as inputs